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Message-ID: <VI1PR04MB4431F901BEEF2EAB9AB1D7C6EDE00@VI1PR04MB4431.eurprd04.prod.outlook.com>
Date: Sat, 7 Mar 2020 10:32:43 +0000
From: Peng Ma <peng.ma@....com>
To: Michael Walle <michael@...le.cc>
CC: "dmaengine@...r.kernel.org" <dmaengine@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
Vinod Koul <vkoul@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Shawn Guo <shawnguo@...nel.org>, Leo Li <leoyang.li@....com>
Subject: RE: [EXT] [PATCH 2/2] arm64: dts: ls1028a: add "fsl,vf610-edma"
compatible
>-----Original Message-----
>From: Michael Walle <michael@...le.cc>
>Sent: 2020年3月7日 17:26
>To: Peng Ma <peng.ma@....com>
>Cc: dmaengine@...r.kernel.org; devicetree@...r.kernel.org;
>linux-kernel@...r.kernel.org; linux-arm-kernel@...ts.infradead.org; Vinod Koul
><vkoul@...nel.org>; Rob Herring <robh+dt@...nel.org>; Mark Rutland
><mark.rutland@....com>; Shawn Guo <shawnguo@...nel.org>; Leo Li
><leoyang.li@....com>
>Subject: Re: [EXT] [PATCH 2/2] arm64: dts: ls1028a: add "fsl,vf610-edma"
>compatible
>
>Caution: EXT Email
>
>Hi Peng,
>
>Am 2020-03-07 03:09, schrieb Peng Ma:
>>> -----Original Message-----
>>> From: Michael Walle <michael@...le.cc>
>>> Sent: 2020年3月7日 4:54
>>> To: dmaengine@...r.kernel.org; devicetree@...r.kernel.org;
>>> linux-kernel@...r.kernel.org; linux-arm-kernel@...ts.infradead.org
>>> Cc: Vinod Koul <vkoul@...nel.org>; Rob Herring <robh+dt@...nel.org>;
>>> Mark Rutland <mark.rutland@....com>; Shawn Guo
><shawnguo@...nel.org>;
>>> Leo Li <leoyang.li@....com>; Peng Ma <peng.ma@....com>; Michael Walle
>>> <michael@...le.cc>
>>> Subject: [EXT] [PATCH 2/2] arm64: dts: ls1028a: add "fsl,vf610-edma"
>>> compatible
>>>
>>> Caution: EXT Email
>>>
>>> The bootloader does the IOMMU fixup and dynamically adds the "iommus"
>>> property to devices according to its compatible string. In case of
>>> the eDMA controller this property is missing. Add it. After that the
>>> IOMMU will work with the eDMA core.
>>>
>>> Signed-off-by: Michael Walle <michael@...le.cc>
>>> ---
>>> arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 2 +-
>>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
>>> b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
>>> index b152fa90cf5c..aa467bff2209 100644
>>> --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
>>> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
>>> @@ -447,7 +447,7 @@
>>>
>>> edma0: dma-controller@...0000 {
>>> #dma-cells = <2>;
>>> - compatible = "fsl,ls1028a-edma";
>>> + compatible = "fsl,ls1028a-edma",
>>> + "fsl,vf610-edma";
>> Hi Michael,
>>
>> You should change it on bootloader instead of kernel, Some Reg of
>> LS1028a is different from others, So we used compatible
>> "fsl,ls1028a-edm" to distinguish "
>> fsl,vf610-edma".
>
>Yes this might be the right thing to do. So since it is NXPs bootloader feel free to
>fix that ;) Looking at the u-boot code right now, I don't even know it that is the
>right fix at all. The fixup code in u-boot is SoC independent (its in fsl_icid.h and is
>enabled with CONFIG_LSCH3, ie your chassis version). For example, the sdhc
>fixup will scan the nodes for "compatible = fsl,esdhc", which is also the
>secondary compatible for the "ls1028a-esdhc" compatible.
>
>And here is another reason to have it this way: we need backwards compatibility,
>the are already boards out there whose bootloader will fix-up the "old" node.
>Thus I don't see any other possibilty.
>
[Peng Ma] OK, There is non fixed on uboot.
I will fix it on uboot, if you want to use now, please change the uboot as below:
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c
index d9d125e8ba..db9dd69548 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c
@@ -14,7 +14,7 @@ struct icid_id_table icid_tbl[] = {
SET_SDHC_ICID(1, FSL_SDMMC_STREAM_ID),
SET_SDHC_ICID(2, FSL_SDMMC2_STREAM_ID),
SET_SATA_ICID(1, "fsl,ls1028a-ahci", FSL_SATA1_STREAM_ID),
- SET_EDMA_ICID(FSL_EDMA_STREAM_ID),
+ SET_EDMA_ICID_LS1028(FSL_EDMA_STREAM_ID),
SET_QDMA_ICID("fsl,ls1028a-qdma", FSL_DMA_STREAM_ID),
SET_GPU_ICID("fsl,ls1028a-gpu", FSL_GPU_STREAM_ID),
SET_DISPLAY_ICID(FSL_DISPLAY_STREAM_ID),
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h b/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h
index 37e2fe4e66..15d0b60dbe 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h
@@ -144,6 +144,10 @@ extern int fman_icid_tbl_sz;
SET_GUR_ICID("fsl,vf610-edma", streamid, spare3_amqr,\
EDMA_BASE_ADDR)
+#define SET_EDMA_ICID_LS1028(streamid) \
+ SET_GUR_ICID("fsl,ls1028a-edma", streamid, spare3_amqr,\
+ EDMA_BASE_ADDR)
+
#define SET_GPU_ICID(compat, streamid) \
SET_GUR_ICID(compat, streamid, misc1_amqr,\
GPU_BASE_ADDR)
BR,
Peng
>-michael
>
>>
>> Thanks,
>> Peng
>>> reg = <0x0 0x22c0000 0x0 0x10000>,
>>> <0x0 0x22d0000 0x0 0x10000>,
>>> <0x0 0x22e0000 0x0 0x10000>;
>>> --
>>> 2.20.1
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