linux-kernel - drivers/soc/fsl/qe/ucc.c:637:20: sparse: sparse: incorrect type in assignment (different address spaces)

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Date:   Sat, 7 Mar 2020 23:20:11 +0800
From:   kbuild test robot <lkp@...el.com>
To:     Rasmus Villemoes <linux@...musvillemoes.dk>
Cc:     kbuild-all@...ts.01.org, linux-kernel@...r.kernel.org,
        Li Yang <leoyang.li@....com>, Timur Tabi <timur@...nel.org>
Subject: drivers/soc/fsl/qe/ucc.c:637:20: sparse: sparse: incorrect type in
 assignment (different address spaces)

Hi Rasmus,

First bad commit (maybe != root cause):

tree:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head:   63849c8f410717eb2e6662f3953ff674727303e7
commit: 5a35435ef4e6e4bd2aabd6706b146b298a9cffe5 soc: fsl: qe: remove PPC32 dependency from CONFIG_QUICC_ENGINE
date:   3 months ago
reproduce:
        # apt-get install sparse
        # sparse version: v0.6.1-174-g094d5a94-dirty
        git checkout 5a35435ef4e6e4bd2aabd6706b146b298a9cffe5
        make ARCH=x86_64 allmodconfig
        make C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__'

If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@...el.com>


sparse warnings: (new ones prefixed by >>)

>> drivers/soc/fsl/qe/ucc.c:637:20: sparse: sparse: incorrect type in assignment (different address spaces) @@    expected struct qe_mux *qe_mux_reg @@    got struct qe_mux [nodstruct qe_mux *qe_mux_reg @@
   drivers/soc/fsl/qe/ucc.c:637:20: sparse:    expected struct qe_mux *qe_mux_reg
   drivers/soc/fsl/qe/ucc.c:637:20: sparse:    got struct qe_mux [noderef] <asn:2> *
>> drivers/soc/fsl/qe/ucc.c:652:9: sparse: sparse: incorrect type in argument 1 (different address spaces) @@    expected void [noderef] <asn:2> * @@    got [noderef] <asn:2> * @@
   drivers/soc/fsl/qe/ucc.c:652:9: sparse:    expected void [noderef] <asn:2> *
   drivers/soc/fsl/qe/ucc.c:652:9: sparse:    got restricted __be32 *
   drivers/soc/fsl/qe/ucc.c:652:9: sparse: sparse: incorrect type in argument 2 (different address spaces) @@    expected void [noderef] <asn:2> * @@    got [noderef] <asn:2> * @@
   drivers/soc/fsl/qe/ucc.c:652:9: sparse:    expected void [noderef] <asn:2> *
   drivers/soc/fsl/qe/ucc.c:652:9: sparse:    got restricted __be32 *

vim +637 drivers/soc/fsl/qe/ucc.c

bb8b2062aff321 Zhao Qiang       2016-06-06  629  
bb8b2062aff321 Zhao Qiang       2016-06-06  630  int ucc_set_tdm_rxtx_sync(u32 tdm_num, enum qe_clock clock,
bb8b2062aff321 Zhao Qiang       2016-06-06  631  			  enum comm_dir mode)
bb8b2062aff321 Zhao Qiang       2016-06-06  632  {
bb8b2062aff321 Zhao Qiang       2016-06-06  633  	int source;
bb8b2062aff321 Zhao Qiang       2016-06-06  634  	u32 shift;
bb8b2062aff321 Zhao Qiang       2016-06-06  635  	struct qe_mux *qe_mux_reg;
bb8b2062aff321 Zhao Qiang       2016-06-06  636  
bb8b2062aff321 Zhao Qiang       2016-06-06 @637  	qe_mux_reg = &qe_immr->qmx;
bb8b2062aff321 Zhao Qiang       2016-06-06  638  
bb8b2062aff321 Zhao Qiang       2016-06-06  639  	if (tdm_num >= UCC_TDM_NUM)
bb8b2062aff321 Zhao Qiang       2016-06-06  640  		return -EINVAL;
bb8b2062aff321 Zhao Qiang       2016-06-06  641  
bb8b2062aff321 Zhao Qiang       2016-06-06  642  	/* The communications direction must be RX or TX */
bb8b2062aff321 Zhao Qiang       2016-06-06  643  	if (mode != COMM_DIR_RX && mode != COMM_DIR_TX)
bb8b2062aff321 Zhao Qiang       2016-06-06  644  		return -EINVAL;
bb8b2062aff321 Zhao Qiang       2016-06-06  645  
bb8b2062aff321 Zhao Qiang       2016-06-06  646  	source = ucc_get_tdm_sync_source(tdm_num, clock, mode);
bb8b2062aff321 Zhao Qiang       2016-06-06  647  	if (source < 0)
bb8b2062aff321 Zhao Qiang       2016-06-06  648  		return -EINVAL;
bb8b2062aff321 Zhao Qiang       2016-06-06  649  
bb8b2062aff321 Zhao Qiang       2016-06-06  650  	shift = ucc_get_tdm_sync_shift(mode, tdm_num);
bb8b2062aff321 Zhao Qiang       2016-06-06  651  
d9d95bcad38d18 Rasmus Villemoes 2019-11-28 @652  	qe_clrsetbits_be32(&qe_mux_reg->cmxsi1syr,

:::::: The code at line 637 was first introduced by commit
:::::: bb8b2062aff321af1fc58781cc07fbbea01cceb3 fsl/qe: setup clock source for TDM mode

:::::: TO: Zhao Qiang <qiang.zhao@....com>
:::::: CC: David S. Miller <davem@...emloft.net>

---
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