linux-kernel - [PATCH v5 4/9] dt-bindings: phy: qcom-qusb2: Add support for overriding Phy tuning parameters

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-Id: <1583747589-17267-5-git-send-email-sanm@codeaurora.org>
Date:   Mon,  9 Mar 2020 15:23:04 +0530
From:   Sandeep Maheswaram <sanm@...eaurora.org>
To:     Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Kishon Vijay Abraham I <kishon@...com>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Stephen Boyd <swboyd@...omium.org>,
        Doug Anderson <dianders@...omium.org>,
        Matthias Kaehlcke <mka@...omium.org>
Cc:     linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org, Manu Gautam <mgautam@...eaurora.org>,
        Sandeep Maheswaram <sanm@...eaurora.org>
Subject: [PATCH v5 4/9] dt-bindings: phy: qcom-qusb2: Add support for overriding Phy tuning parameters

Add support for overriding QUSB2 V2 phy tuning parameters
in device tree bindings.

Signed-off-by: Sandeep Maheswaram <sanm@...eaurora.org>
Reviewed-by: Rob Herring <robh@...nel.org>
Reviewed-by: Stephen Boyd <swboyd@...omium.org>
Reviewed-by: Matthias Kaehlcke <mka@...omium.org>
---
 .../devicetree/bindings/phy/qcom,qusb2-phy.yaml    | 32 +++++++++++++++++++++-
 1 file changed, 31 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml
index 60124a3..144ae29 100644
--- a/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml
@@ -75,7 +75,7 @@ if:
   properties:
     compatible:
       contains:
-        const: qcom,sdm845-qusb2-phy
+        const: qcom,qusb2-v2-phy
 then:
   properties:
     qcom,imp-res-offset-value:
@@ -89,6 +89,26 @@ then:
           maximum: 63
           default: 0
 
+    qcom,bias-ctrl-value:
+      description:
+        It is a 6 bit value that specifies bias-ctrl-value. It is a PHY
+        tuning parameter that may vary for different boards of same SOC.
+      allOf:
+        - $ref: /schemas/types.yaml#/definitions/uint32
+        - minimum: 0
+          maximum: 63
+          default: 0
+
+    qcom,charge-ctrl-value:
+     description:
+        It is a 2 bit value that specifies charge-ctrl-value. It is a PHY
+        tuning parameter that may vary for different boards of same SOC.
+     allOf:
+       - $ref: /schemas/types.yaml#/definitions/uint32
+       - minimum: 0
+         maximum: 3
+         default: 0
+
     qcom,hstx-trim-value:
       description:
         It is a 4 bit value that specifies tuning for HSTX
@@ -124,6 +144,16 @@ then:
           maximum: 1
           default: 0
 
+    qcom,hsdisc-trim-value:
+      description:
+        It is a 2 bit value tuning parameter that control disconnect
+        threshold and may vary for different boards of same SOC.
+      allOf:
+        - $ref: /schemas/types.yaml#/definitions/uint32
+        - minimum: 0
+          maximum: 3
+          default: 0
+
 required:
   - compatible
   - reg
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation