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Message-ID: <c2239e7cb2de43c28ee9195314f56383@sphcmbx01.sunplus.com.tw>
Date: Mon, 9 Mar 2020 05:32:00 +0000
From: Wells Lu 呂芳騰 <wells.lu@...plus.com>
To: Andreas Färber <afaerber@...e.de>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>
CC: Dvorkin Dmitry <dvorkin@...bo.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
Rob Herring <robh+dt@...nel.org>,
"Greg Kroah-Hartman" <gregkh@...uxfoundation.org>,
"linux-serial@...r.kernel.org" <linux-serial@...r.kernel.org>,
Thomas Gleixner <tglx@...utronix.de>,
"Jason Cooper" <jason@...edaemon.net>,
Marc Zyngier <maz@...nel.org>,
张杰 <j.zhang@...media.com.cn>,
覃健 <qinjian@...media.com.cn>
Subject: RE: [RFC 00/11] ARM: Initial Sunplus Plus1 SP7021 and BPI-F2S support
Added Jie Zhang and Jian Qin in to cc list.
Jie Zhang is software leader of Sunplus Plus 1 (SP7021) platform.
-----Original Message-----
From: Andreas Färber <afaerber@...e.de>
Sent: Monday, March 09, 2020 12:32 AM
To: linux-arm-kernel@...ts.infradead.org
Cc: Wells Lu 呂芳騰 <wells.lu@...plus.com>; Dvorkin Dmitry <dvorkin@...bo.com>; linux-kernel@...r.kernel.org; Andreas Färber <afaerber@...e.de>; devicetree@...r.kernel.org; Rob Herring <robh+dt@...nel.org>; Greg Kroah-Hartman <gregkh@...uxfoundation.org>; linux-serial@...r.kernel.org; Thomas Gleixner <tglx@...utronix.de>; Jason Cooper <jason@...edaemon.net>; Marc Zyngier <maz@...nel.org>
Subject: [RFC 00/11] ARM: Initial Sunplus Plus1 SP7021 and BPI-F2S support
Hello,
This patch series adds initial drivers and Device Trees for Sunplus Plus1 series (codename Pentagram) SP7021 SoC and Banana Pi BPI-F2S SBC.
First, minimal Kconfig, DT and earlycon driver are prepared to get serial output at all. Next, interrupt controller and full serial driver are added that allow to boot into an initrd with interactive serial console.
Device Tree files added are for the CPU-Chip (aka A-Chip) with quad Cortex-A7, but the file split prepares for also adding the Peripheral-Chip (B-Chip) with
ARM9 later. However, for now this is not reflected in the .dts filename; this corresponds to the vf610- vs. vf610m4- naming scheme, whereas an alternative would be to use sp7021-cchip- vs. -pchip- prefix (as sp7021-cpu- looks weird).
It is assumed we can reuse the same SoC and board bindings for CA7 and ARM9 and only differ for IP blocks where needed.
My inquiry to Sunplus about their GIC (anticipating complaints from Marc) remained unanswered, so I've added the two extra regions and irq myself, without being able to test KVM due to BSP U-Boot not booting in HYP mode.
According to Sunplus the mode can be changed in U-Boot (but where/how?).
Similarly, the architectural timer is not properly initialized in BSP U-Boot, so that I currently have a mach- hack in my tree below. Unlike RTD1195, we do have U-Boot sources (v2019.04 based), so should be able to fix this in the bootloader rather than in the kernel, thus not included as patch here.
Based on SoC online manual [1] and downstream BPI-F2S BSP tree [2] as well as my previous Actions serial and Realtek irqchip drivers and DTs.
More details at:
https://en.opensuse.org/HCL:BananaPi_F2S
Latest experimental patches at:
https://github.com/afaerber/linux/commits/f2s-next
Have a lot of fun!
Cheers,
Andreas
[1] https://sunplus-tibbo.atlassian.net/wiki/spaces/doc/pages/470450252/SP7021+Technical+Manual
[2] https://github.com/BPI-SINOVOIP/BPI-F2S-bsp
Cc: devicetree@...r.kernel.org
Cc: Rob Herring <robh+dt@...nel.org>
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
Cc: linux-serial@...r.kernel.org
Cc: Thomas Gleixner <tglx@...utronix.de>
Cc: Jason Cooper <jason@...edaemon.net>
Cc: Marc Zyngier <maz@...nel.org>
Cc: Wells Lu 呂芳騰 <wells.lu@...plus.com>
Cc: Dvorkin Dmitry <dvorkin@...bo.com>
Andreas Färber (11):
dt-bindings: vendor-prefixes: Add Sunplus
dt-bindings: arm: Add Sunplus SP7021 and Banana Pi BPI-F2S
ARM: Prepare Sunplus Plus1 SoC family
dt-bindings: interrupt-controller: Add Sunplus SP7021 mux
dt-bindings: serial: Add Sunplus SP7021 UART
tty: serial: Add Sunplus Plus1 UART earlycon
ARM: dts: Add Sunplus Plus1 SP7021 and Banana Pi F2S
tty: serial: sunplus: Implement full UART driver
irqchip: Add Sunplus SP7021 interrupt (mux) controller
ARM: dts: sp7021-cpu: Add interrupt controller node
ARM: dts: sp7021-cpu: Add dummy UART0 clock and interrupt
Documentation/devicetree/bindings/arm/sunplus.yaml | 22 +
.../sunplus,pentagram-intc.yaml | 50 ++
.../bindings/serial/sunplus,pentagram-uart.yaml | 24 +
.../devicetree/bindings/vendor-prefixes.yaml | 2 +
arch/arm/Kconfig | 2 +
arch/arm/Makefile | 1 +
arch/arm/boot/dts/Makefile | 2 +
arch/arm/boot/dts/pentagram-sp7021-bpi-f2s.dts | 29 +
arch/arm/boot/dts/pentagram-sp7021-cpu.dtsi | 93 +++
arch/arm/boot/dts/pentagram-sp7021.dtsi | 61 ++
arch/arm/mach-sunplus/Kconfig | 10 +
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-sp7021.c | 285 ++++++++
drivers/tty/serial/Kconfig | 19 +
drivers/tty/serial/Makefile | 1 +
drivers/tty/serial/sunplus-uart.c | 770 +++++++++++++++++++++
include/uapi/linux/serial_core.h | 3 +
17 files changed, 1375 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/sunplus.yaml
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/sunplus,pentagram-intc.yaml
create mode 100644 Documentation/devicetree/bindings/serial/sunplus,pentagram-uart.yaml
create mode 100644 arch/arm/boot/dts/pentagram-sp7021-bpi-f2s.dts
create mode 100644 arch/arm/boot/dts/pentagram-sp7021-cpu.dtsi
create mode 100644 arch/arm/boot/dts/pentagram-sp7021.dtsi
create mode 100644 arch/arm/mach-sunplus/Kconfig create mode 100644 drivers/irqchip/irq-sp7021.c create mode 100644 drivers/tty/serial/sunplus-uart.c
--
2.16.4
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