linux-kernel - [PATCH v7 11/13] pwm: sun4i: Use 64-bit division macros for period and duty cycle

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Message-Id: <e553511c1c29ebf5af7d2798f92adf886711c861.1583782035.git.gurus@codeaurora.org>
Date:   Mon,  9 Mar 2020 12:35:14 -0700
From:   Guru Das Srinagesh <gurus@...eaurora.org>
To:     linux-pwm@...r.kernel.org
Cc:     Thierry Reding <thierry.reding@...il.com>,
        Uwe Kleine-König <uwe@...ine-koenig.org>,
        Subbaraman Narayanamurthy <subbaram@...eaurora.org>,
        linux-kernel@...r.kernel.org,
        Guru Das Srinagesh <gurus@...eaurora.org>,
        Maxime Ripard <mripard@...nel.org>,
        Chen-Yu Tsai <wens@...e.org>,
        Philipp Zabel <p.zabel@...gutronix.de>
Subject: [PATCH v7 11/13] pwm: sun4i: Use 64-bit division macros for period and duty cycle

Because period and duty cycle are defined in the PWM framework structs
as ints with units of nanoseconds, the maximum time duration that can be
set is limited to ~2.147 seconds. Redefining them as u64 values will
enable larger time durations to be set.

As a first step, prepare drivers to handle the switch to u64 period and
duty_cycle by replacing division operations involving pwm period and duty cycle
with their 64-bit equivalents as appropriate. The actual switch to u64 period
and duty_cycle follows as a separate patch.

Where the dividend is 64-bit but the divisor is 32-bit, use *_ULL
macros:
- DIV_ROUND_UP_ULL
- DIV_ROUND_CLOSEST_ULL
- div_u64

Where the divisor is 64-bit (dividend may be 32-bit or 64-bit), use
DIV64_* macros:
- DIV64_U64_ROUND_CLOSEST
- div64_u64

Cc: Maxime Ripard <mripard@...nel.org>
Cc: Chen-Yu Tsai <wens@...e.org>
Cc: Philipp Zabel <p.zabel@...gutronix.de>

Signed-off-by: Guru Das Srinagesh <gurus@...eaurora.org>
---
 drivers/pwm/pwm-sun4i.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pwm/pwm-sun4i.c b/drivers/pwm/pwm-sun4i.c
index 3e3efa6..772fdf4 100644
--- a/drivers/pwm/pwm-sun4i.c
+++ b/drivers/pwm/pwm-sun4i.c
@@ -286,7 +286,7 @@ static int sun4i_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
 	val = (duty & PWM_DTY_MASK) | PWM_PRD(period);
 	sun4i_pwm_writel(sun4i_pwm, val, PWM_CH_PRD(pwm->hwpwm));
 	sun4i_pwm->next_period[pwm->hwpwm] = jiffies +
-		usecs_to_jiffies(cstate.period / 1000 + 1);
+		usecs_to_jiffies(div_u64(cstate.period, 1000) + 1);
 	sun4i_pwm->needs_delay[pwm->hwpwm] = true;
 
 	if (state->polarity != PWM_POLARITY_NORMAL)
-- 
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