[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20200310183338.19961-1-miquel.raynal@bootlin.com>
Date: Tue, 10 Mar 2020 19:33:38 +0100
From: Miquel Raynal <miquel.raynal@...tlin.com>
To: Chuanhong Guo <gch981213@...il.com>, linux-mtd@...ts.infradead.org,
Miquel Raynal <miquel.raynal@...tlin.com>,
Boris Brezillon <bbrezillon@...nel.org>
Cc: Richard Weinberger <richard@....at>,
Vignesh Raghavendra <vigneshr@...com>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4] mtd: nand: spi: rework detect procedure for different read id op
On Sat, 2020-02-08 at 07:43:50 UTC, Chuanhong Guo wrote:
> Currently there are 3 different variants of read_id implementation:
> 1. opcode only. Found in GD5FxGQ4xF.
> 2. opcode + 1 addr byte. Found in GD5GxGQ4xA/E
> 3. opcode + 1 dummy byte. Found in other currently supported chips.
>
> Original implementation was for variant 1 and let detect function
> of chips with variant 2 and 3 to ignore the first byte. This isn't
> robust:
>
> 1. For chips of variant 2, if SPI master doesn't keep MOSI low
> during read, chip will get a random id offset, and the entire id
> buffer will shift by that offset, causing detect failure.
>
> 2. For chips of variant 1, if it happens to get a devid that equals
> to manufacture id of variant 2 or 3 chips, it'll get incorrectly
> detected.
>
> This patch reworks detect procedure to address problems above. New
> logic do detection for all variants separatedly, in 1-2-3 order.
> Since all current detect methods do exactly the same id matching
> procedure, unify them into core.c and remove detect method from
> manufacture_ops.
>
> Tested on GD5F1GQ4UAYIG and W25N01GVZEIG.
>
> Signed-off-by: Chuanhong Guo <gch981213@...il.com>
Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git nand/next, thanks.
Miquel
Powered by blists - more mailing lists