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Message-Id: <20200310194854.831-1-linux.amoon@gmail.com>
Date: Tue, 10 Mar 2020 19:48:49 +0000
From: Anand Moon <linux.amoon@...il.com>
To: linux-usb@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-clk@...r.kernel.org
Cc: Rob Herring <robh+dt@...nel.org>, Kukjin Kim <kgene@...nel.org>,
Krzysztof Kozlowski <krzk@...nel.org>,
Marek Szyprowski <m.szyprowski@...sung.com>,
Bartlomiej Zolnierkiewicz <b.zolnierkie@...sung.com>,
Felipe Balbi <balbi@...nel.org>,
Sylwester Nawrocki <s.nawrocki@...sung.com>,
Tomasz Figa <tomasz.figa@...il.com>,
Chanwoo Choi <cw00.choi@...sung.com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>
Subject: [PATCHv3 0/5] Add support for FSYS power domain and enable suspend clk for Exynos542x SoC
Series build and tested on linux next-20200306.
This patch series tries to enable FSYS power domain
for USBDRD3, PDMA and USB2.0 devices.
Some new patches is added to enable this feature.
Summary:
# powerdebug -d
...
FSYS:
current_state: on
active_time: 236786 ms
total_idle_time: 1914 ms
Idle States:
State Time
S0 1914
Devices:
/devices/platform/soc/10010000.clock-controller/exynos5-subcmu.6.auto
/devices/platform/soc/12130000.phy
/devices/platform/soc/12100000.phy
/devices/platform/soc/12500000.phy
/devices/platform/soc/soc:amba/121a0000.pdma
/devices/platform/soc/soc:amba/121b0000.pdma
/devices/platform/soc/12110000.usb
/devices/platform/soc/12120000.usb
/devices/platform/soc/soc:usb3-0
/devices/platform/soc/soc:usb3-1
This patch series tries to enable suspend clk using
exynos dwc3 driver, for this I have added new
compatible string "samsung,exynos5420-dwusb3"
so that we could add new suspend clk in addition
to the core clk. exynos dwc3 driver will help
enable/disable these clk.
This series PatchV2.
--Added the clk names for exynos5420 compatible.
--Added missing support for Exyno5410 SoC suspend clock.
--Update the commit message to support suspend clk usages.
---
Long time ago I tried to add suspend clk for dwc3 phy
which was wrong appoch, see below.
[0] https://lore.kernel.org/patchwork/patch/837635/
[1] https://lore.kernel.org/patchwork/patch/837636/
Previous changes V3 (It was send with wrong Patch version)
[2] https://patchwork.kernel.org/cover/11373043/
-Anand
Anand Moon (5):
devicetree: bindings: exynos: Add new compatible for Exynos5420 dwc3
clocks support
ARM: dts: exynos: Add missing usbdrd3 suspend clk
ARM: dts: exynos: Add FSYS power domain to Exynos542x USB nodes
usb: dwc3: exynos: Add support for Exynos5422 suspend clk
clk: samsung: exynos542x: Move FSYS subsystem clocks to its sub-CMU
.../devicetree/bindings/usb/exynos-usb.txt | 5 ++-
arch/arm/boot/dts/exynos5410.dtsi | 8 ++--
arch/arm/boot/dts/exynos5420.dtsi | 24 ++++++++--
arch/arm/boot/dts/exynos54xx.dtsi | 4 +-
drivers/clk/samsung/clk-exynos5420.c | 45 ++++++++++++++-----
drivers/usb/dwc3/dwc3-exynos.c | 9 ++++
6 files changed, 73 insertions(+), 22 deletions(-)
--
2.25.1
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