| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Date: Tue, 10 Mar 2020 08:43:10 +0000
From: Robin Gong <yibin.gong@....com>
To: Sascha Hauer <s.hauer@...gutronix.de>
CC: "vkoul@...nel.org" <vkoul@...nel.org>,
"shawnguo@...nel.org" <shawnguo@...nel.org>,
"u.kleine-koenig@...gutronix.de" <u.kleine-koenig@...gutronix.de>,
"broonie@...nel.org" <broonie@...nel.org>,
"robh+dt@...nel.org" <robh+dt@...nel.org>,
"festevam@...il.com" <festevam@...il.com>,
"dan.j.williams@...el.com" <dan.j.williams@...el.com>,
"mark.rutland@....com" <mark.rutland@....com>,
"catalin.marinas@....com" <catalin.marinas@....com>,
"will.deacon@....com" <will.deacon@....com>,
"l.stach@...gutronix.de" <l.stach@...gutronix.de>,
"martin.fuzzey@...wbird.group" <martin.fuzzey@...wbird.group>,
"kernel@...gutronix.de" <kernel@...gutronix.de>,
"linux-spi@...r.kernel.org" <linux-spi@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
dl-linux-imx <linux-imx@....com>,
"dmaengine@...r.kernel.org" <dmaengine@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
Subject: RE: [RESEND v6 07/13] spi: imx: remove ERR009165 workaround on
i.mx6ul
On 2020/03/10 Sascha Hauer <s.hauer@...gutronix.de> wrote:
> On Tue, Mar 10, 2020 at 07:31:56PM +0800, Robin Gong wrote:
> > ERR009165 fixed on i.mx6ul/6ull/6sll. All other i.mx6/7 and i.mx8m/8mm
> > still need this errata. Please refer to nxp official errata document
> > from
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww.nx
> p.com%2F&data=02%7C01%7Cyibin.gong%40nxp.com%7Cf73bfc11a68c4
> 2f5f6d308d7c4c96efa%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C
> 637194241755109112&sdata=xzIUP8qZkrlDXX0yjTcUNZB6zDrevTdHFg1o4
> PZZd8E%3D&reserved=0 .
> >
> > For removing workaround on those chips. Add new i.mx6ul type.
> >
> > Signed-off-by: Robin Gong <yibin.gong@....com>
> > Acked-by: Mark Brown <broonie@...nel.org>
> > ---
> > drivers/spi/spi-imx.c | 50
> > +++++++++++++++++++++++++++++++++++++++++++++-----
> > 1 file changed, 45 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c index
> > 842a86e..f7ee2ec 100644
> > --- a/drivers/spi/spi-imx.c
> > +++ b/drivers/spi/spi-imx.c
> > @@ -57,6 +57,7 @@ enum spi_imx_devtype {
> > IMX35_CSPI, /* CSPI on all i.mx except above */
> > IMX51_ECSPI, /* ECSPI on i.mx51 */
> > IMX53_ECSPI, /* ECSPI on i.mx53 and later */
> > + IMX6UL_ECSPI, /* ERR009165 fix from i.mx6ul */
> > };
> >
> > struct spi_imx_data;
> > @@ -75,6 +76,11 @@ struct spi_imx_devtype_data {
> > bool has_slavemode;
> > unsigned int fifo_size;
> > bool dynamic_burst;
> > + /*
> > + * ERR009165 fixed or not:
> > + *
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww.nx
> p.com%2Fdocs%2Fen%2Ferrata%2FIMX6DQCE.pdf&data=02%7C01%7Cyi
> bin.gong%40nxp.com%7Cf73bfc11a68c42f5f6d308d7c4c96efa%7C686ea1d3bc
> 2b4c6fa92cd99c5c301635%7C0%7C1%7C637194241755109112&sdata=m
> uw4HL5nMDjREJwVd885Wrxka0moMaaZ%2BhJgsAgY3eo%3D&reserved=
> 0
> > + */
> > + bool tx_glitch_fixed;
> > enum spi_imx_devtype devtype;
> > };
> >
> > @@ -128,7 +134,8 @@ static inline int is_imx35_cspi(struct
> > spi_imx_data *d)
> >
> > static inline int is_imx51_ecspi(struct spi_imx_data *d) {
> > - return d->devtype_data->devtype == IMX51_ECSPI;
> > + return d->devtype_data->devtype == IMX51_ECSPI ||
> > + d->devtype_data->devtype == IMX6UL_ECSPI;
> > }
>
> Erm, no. A i.MX51 ECSPI is a i.MX51 ECSPI and not a i.MX6UL ECSPI. If you want
> to handle them equally somewhere then explicitly test for i.MX6ul *and*
> i.MX51 there.
But all i.mx6 chips including i.MX53 ECSPI are almost same as i.MX51 ECSPI, and ERR00915 is fixed from i.mx6ul....
>
> >
> > static inline int is_imx53_ecspi(struct spi_imx_data *d) @@ -585,9
> > +592,16 @@ static int mx51_ecspi_prepare_transfer(struct spi_imx_data
> *spi_imx,
> > ctrl |= mx51_ecspi_clkdiv(spi_imx, t->speed_hz, &clk);
> > spi_imx->spi_bus_clk = clk;
> >
> > - /* ERR009165: work in XHC mode as PIO */
> > - if (spi_imx->usedma)
> > - ctrl &= ~MX51_ECSPI_CTRL_SMC;
> > + /*
> > + * ERR009165: work in XHC mode instead of SMC as PIO on the chips
> > + * before i.mx6ul.
> > + */
> > + if (spi_imx->usedma) {
> > + if (spi_imx->devtype_data->tx_glitch_fixed)
> > + ctrl |= MX51_ECSPI_CTRL_SMC;
> > + else
> > + ctrl &= ~MX51_ECSPI_CTRL_SMC;
> > + }
>
> Changed again, but the PIO case still not honoured. This should look like
> if (spi_imx->usedma && spi_imx->devtype_data->tx_glitch_fixed)
> ctrl |= MX51_ECSPI_CTRL_SMC;
> else
> ctrl &= ~MX51_ECSPI_CTRL_SMC;
>
Okay, will fix in v7.
> >
> > writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL);
> >
> > @@ -615,6 +629,8 @@ static void mx51_setup_wml(struct spi_imx_data
> > *spi_imx) {
> > u32 tx_wml = 0;
> >
> > + if (spi_imx->devtype_data->tx_glitch_fixed)
> > + tx_wml = spi_imx->wml;
>
> That explains the variable introduced in the last patch, ok.
>
> I have the impression that splitting up 06/13 and 07/13 into two patches
> doesn't make it easier to review.
But 06 is a errata for all i.mx6 legacy chips, while 07 is for i.mx6ul and newer chips which have been already fixed the HW issue. I think two patches are better.
>
> Sascha
>
>
> --
> Pengutronix e.K. |
> |
> Steuerwalder Str. 21 |
> https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww.pe
> ngutronix.de%2F&data=02%7C01%7Cyibin.gong%40nxp.com%7Cf73bfc11
> a68c42f5f6d308d7c4c96efa%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7
> C1%7C637194241755114106&sdata=DKe%2B2SynMv%2Be3rMBrO79ou6
> 5ADTwO03KRT%2FqsDbCWjc%3D&reserved=0 |
> 31137 Hildesheim, Germany | Phone: +49-5121-206917-0
> |
> Amtsgericht Hildesheim, HRA 2686 | Fax:
> +49-5121-206917-5555 |
Powered by blists - more mailing lists