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Date:   Wed, 11 Mar 2020 19:18:31 +0100
From:   Hans de Goede <hdegoede@...hat.com>
To:     Andy Shevchenko <andy@...radead.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
        "H . Peter Anvin" <hpa@...or.com>
Cc:     Vipul Kumar <vipulk0511@...il.com>,
        Vipul Kumar <vipul_kumar@...tor.com>,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        Srikanth Krishnakar <Srikanth_Krishnakar@...tor.com>,
        Cedric Hombourger <Cedric_Hombourger@...tor.com>,
        Len Brown <len.brown@...el.com>,
        Rahul Tanwar <rahul.tanwar@...ux.intel.com>,
        Tony Luck <tony.luck@...el.com>,
        Gayatri Kammela <gayatri.kammela@...el.com>, x86@...nel.org,
        linux-kernel@...r.kernel.org, stable@...r.kernel.org
Subject: Re: [PATCH v4 1/3] x86/tsc_msr: Use named struct initializers

Hi,

On 2/23/20 3:06 PM, Hans de Goede wrote:
> Use named struct initializers for the freq_desc struct-s initialization
> and change the "u8 msr_plat" to a "bool use_msr_plat" to make its meaning
> more clear instead of relying on a comment to explain it.
> 
> Cc: stable@...r.kernel.org
> Signed-off-by: Hans de Goede <hdegoede@...hat.com>

I believe that this series is ready for merging now? Can we
please get this merged?

Regards,

Hans


> ---
>   arch/x86/kernel/tsc_msr.c | 28 ++++++++++++++++++----------
>   1 file changed, 18 insertions(+), 10 deletions(-)
> 
> diff --git a/arch/x86/kernel/tsc_msr.c b/arch/x86/kernel/tsc_msr.c
> index e0cbe4f2af49..5fa41ac3feb1 100644
> --- a/arch/x86/kernel/tsc_msr.c
> +++ b/arch/x86/kernel/tsc_msr.c
> @@ -22,10 +22,10 @@
>    * read in MSR_PLATFORM_ID[12:8], otherwise in MSR_PERF_STAT[44:40].
>    * Unfortunately some Intel Atom SoCs aren't quite compliant to this,
>    * so we need manually differentiate SoC families. This is what the
> - * field msr_plat does.
> + * field use_msr_plat does.
>    */
>   struct freq_desc {
> -	u8 msr_plat;	/* 1: use MSR_PLATFORM_INFO, 0: MSR_IA32_PERF_STATUS */
> +	bool use_msr_plat;
>   	u32 freqs[MAX_NUM_FREQS];
>   };
>   
> @@ -35,31 +35,39 @@ struct freq_desc {
>    * by MSR based on SDM.
>    */
>   static const struct freq_desc freq_desc_pnw = {
> -	0, { 0, 0, 0, 0, 0, 99840, 0, 83200 }
> +	.use_msr_plat = false,
> +	.freqs = { 0, 0, 0, 0, 0, 99840, 0, 83200 },
>   };
>   
>   static const struct freq_desc freq_desc_clv = {
> -	0, { 0, 133200, 0, 0, 0, 99840, 0, 83200 }
> +	.use_msr_plat = false,
> +	.freqs = { 0, 133200, 0, 0, 0, 99840, 0, 83200 },
>   };
>   
>   static const struct freq_desc freq_desc_byt = {
> -	1, { 83300, 100000, 133300, 116700, 80000, 0, 0, 0 }
> +	.use_msr_plat = true,
> +	.freqs = { 83300, 100000, 133300, 116700, 80000, 0, 0, 0 },
>   };
>   
>   static const struct freq_desc freq_desc_cht = {
> -	1, { 83300, 100000, 133300, 116700, 80000, 93300, 90000, 88900, 87500 }
> +	.use_msr_plat = true,
> +	.freqs = { 83300, 100000, 133300, 116700, 80000, 93300, 90000,
> +		   88900, 87500 },
>   };
>   
>   static const struct freq_desc freq_desc_tng = {
> -	1, { 0, 100000, 133300, 0, 0, 0, 0, 0 }
> +	.use_msr_plat = true,
> +	.freqs = { 0, 100000, 133300, 0, 0, 0, 0, 0 },
>   };
>   
>   static const struct freq_desc freq_desc_ann = {
> -	1, { 83300, 100000, 133300, 100000, 0, 0, 0, 0 }
> +	.use_msr_plat = true,
> +	.freqs = { 83300, 100000, 133300, 100000, 0, 0, 0, 0 },
>   };
>   
>   static const struct freq_desc freq_desc_lgm = {
> -	1, { 78000, 78000, 78000, 78000, 78000, 78000, 78000, 78000 }
> +	.use_msr_plat = true,
> +	.freqs = { 78000, 78000, 78000, 78000, 78000, 78000, 78000, 78000 },
>   };
>   
>   static const struct x86_cpu_id tsc_msr_cpu_ids[] = {
> @@ -91,7 +99,7 @@ unsigned long cpu_khz_from_msr(void)
>   		return 0;
>   
>   	freq_desc = (struct freq_desc *)id->driver_data;
> -	if (freq_desc->msr_plat) {
> +	if (freq_desc->use_msr_plat) {
>   		rdmsr(MSR_PLATFORM_INFO, lo, hi);
>   		ratio = (lo >> 8) & 0xff;
>   	} else {
> 

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