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Message-ID: <CAK8P3a0QTKsqoxE7HS7aNrASSHOfFJHfp3+KZNTVoQ12wHi3VQ@mail.gmail.com>
Date: Wed, 11 Mar 2020 23:21:01 +0100
From: Arnd Bergmann <arnd@...db.de>
To: Catalin Marinas <catalin.marinas@....com>
Cc: Russell King - ARM Linux admin <linux@...linux.org.uk>,
Nishanth Menon <nm@...com>,
Santosh Shilimkar <santosh.shilimkar@...cle.com>,
Tero Kristo <t-kristo@...com>,
Linux ARM <linux-arm-kernel@...ts.infradead.org>,
Michal Hocko <mhocko@...e.com>,
Rik van Riel <riel@...riel.com>,
Santosh Shilimkar <ssantosh@...nel.org>,
Dave Chinner <david@...morbit.com>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Linux-MM <linux-mm@...ck.org>,
Yafang Shao <laoar.shao@...il.com>,
Al Viro <viro@...iv.linux.org.uk>,
Johannes Weiner <hannes@...xchg.org>,
linux-fsdevel <linux-fsdevel@...r.kernel.org>,
kernel-team@...com, Kishon Vijay Abraham I <kishon@...com>,
Linus Torvalds <torvalds@...ux-foundation.org>,
Andrew Morton <akpm@...ux-foundation.org>,
Roman Gushchin <guro@...com>
Subject: Re: [PATCH] vfs: keep inodes with page cache off the inode shrinker LRU
On Wed, Mar 11, 2020 at 6:26 PM Catalin Marinas <catalin.marinas@....com> wrote:
> On Wed, Mar 11, 2020 at 05:59:53PM +0100, Arnd Bergmann wrote:
> > On Wed, Mar 11, 2020 at 3:29 PM Catalin Marinas <catalin.marinas@....com> wrote:
> > Do you have an estimate of how long writing to TTBR0_64 takes on Cortex-A7
> > and A15, respectively?
>
> I don't have numbers but it's usually not cheap since you need an ISB to
> synchronise the context after TTBR0 update (basically flushing the
> pipeline).
Ok.
> > Another way might be to use a use a temporary buffer that is already
> > mapped, and add a memcpy() through L1-cache to reduce the number
> > of ttbr0 changes. The buffer would probably have to be on the stack,
> > which limits the size, but for large copies get_user_pages()+memcpy()
> > may end up being faster anyway.
>
> IIRC, the x86 attempt from Ingo some years ago was using
> get_user_pages() for uaccess. Depending on the size of the buffer, this
> may be faster than copying twice.
I guess the tradeoffs for that were rather different, as x86 back
then had no ASIDs, so changing the page tables required a full
TLB flush.
Arnd
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