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Message-Id: <20200311045249.5200-1-kai.heng.feng@canonical.com>
Date:   Wed, 11 Mar 2020 12:52:49 +0800
From:   Kai-Heng Feng <kai.heng.feng@...onical.com>
To:     bhelgaas@...gle.com
Cc:     mika.westerberg@...ux.intel.com, linux-pci@...r.kernel.org,
        linux-kernel@...r.kernel.org,
        Kai-Heng Feng <kai.heng.feng@...onical.com>
Subject: [PATCH] PCI/PM: Skip link training delay for S3 resume

Commit ad9001f2f411 ("PCI/PM: Add missing link delays required by the
PCIe spec") added a 1100ms delay on resume for bridges that don't
support Link Active Reporting.

The commit also states that the delay can be skipped for S3, as the
firmware should already handled the case for us.

So let's skip the link training delay for S3, to save 1100ms resume
time.

Signed-off-by: Kai-Heng Feng <kai.heng.feng@...onical.com>
---
 drivers/pci/pci-driver.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c
index 0454ca0e4e3f..3050375bad04 100644
--- a/drivers/pci/pci-driver.c
+++ b/drivers/pci/pci-driver.c
@@ -916,7 +916,8 @@ static int pci_pm_resume_noirq(struct device *dev)
 	pci_fixup_device(pci_fixup_resume_early, pci_dev);
 	pcie_pme_root_status_cleanup(pci_dev);
 
-	if (!skip_bus_pm && prev_state == PCI_D3cold)
+	if (!skip_bus_pm && prev_state == PCI_D3cold
+	    && !pm_resume_via_firmware())
 		pci_bridge_wait_for_secondary_bus(pci_dev);
 
 	if (pci_has_legacy_pm_support(pci_dev))
-- 
2.17.1

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