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Message-ID: <20200311112235.62d89683@donnerap.cambridge.arm.com>
Date: Wed, 11 Mar 2020 11:22:35 +0000
From: Andre Przywara <andre.przywara@....com>
To: Chen-Yu Tsai <wens@...nel.org>
Cc: Maxime Ripard <mripard@...nel.org>, devicetree@...r.kernel.org,
Chen-Yu Tsai <wens@...e.org>, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 3/3] ARM: dts: sun8i: r40: Move SPI device nodes based
on address order
On Wed, 11 Mar 2020 01:47:09 +0800
Chen-Yu Tsai <wens@...nel.org> wrote:
> From: Chen-Yu Tsai <wens@...e.org>
>
> When the SPI device nodes were added, they were added in the wrong
> location in the device tree file. The device nodes should be sorted
> by register address.
>
> Move the devices node to their correct positions within the file.
Diffed the minus and plus lines, it's indeed a pure move:
Reviewed-by: Andre Przywara <andre.przywara@....com>
Cheers,
Andre
>
> Fixes: 554581b79139 ("ARM: dts: sun8i: R40: Add SPI controllers nodes and pinmuxes")
> Signed-off-by: Chen-Yu Tsai <wens@...e.org>
> ---
> arch/arm/boot/dts/sun8i-r40.dtsi | 104 +++++++++++++++----------------
> 1 file changed, 52 insertions(+), 52 deletions(-)
>
> diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
> index 81cc92ddc78b..f0ede4f52aa3 100644
> --- a/arch/arm/boot/dts/sun8i-r40.dtsi
> +++ b/arch/arm/boot/dts/sun8i-r40.dtsi
> @@ -198,6 +198,32 @@ nmi_intc: interrupt-controller@...0030 {
> interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
> };
>
> + spi0: spi@...5000 {
> + compatible = "allwinner,sun8i-r40-spi",
> + "allwinner,sun8i-h3-spi";
> + reg = <0x01c05000 0x1000>;
> + interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
> + clock-names = "ahb", "mod";
> + resets = <&ccu RST_BUS_SPI0>;
> + status = "disabled";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + spi1: spi@...6000 {
> + compatible = "allwinner,sun8i-r40-spi",
> + "allwinner,sun8i-h3-spi";
> + reg = <0x01c06000 0x1000>;
> + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
> + clock-names = "ahb", "mod";
> + resets = <&ccu RST_BUS_SPI1>;
> + status = "disabled";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> csi0: csi@...9000 {
> compatible = "allwinner,sun8i-r40-csi0",
> "allwinner,sun7i-a20-csi0";
> @@ -307,6 +333,19 @@ crypto: crypto@...5000 {
> resets = <&ccu RST_BUS_CE>;
> };
>
> + spi2: spi@...7000 {
> + compatible = "allwinner,sun8i-r40-spi",
> + "allwinner,sun8i-h3-spi";
> + reg = <0x01c17000 0x1000>;
> + interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&ccu CLK_BUS_SPI2>, <&ccu CLK_SPI2>;
> + clock-names = "ahb", "mod";
> + resets = <&ccu RST_BUS_SPI2>;
> + status = "disabled";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> ahci: sata@...8000 {
> compatible = "allwinner,sun8i-r40-ahci";
> reg = <0x01c18000 0x1000>;
> @@ -364,6 +403,19 @@ ohci2: usb@...c400 {
> status = "disabled";
> };
>
> + spi3: spi@...f000 {
> + compatible = "allwinner,sun8i-r40-spi",
> + "allwinner,sun8i-h3-spi";
> + reg = <0x01c1f000 0x1000>;
> + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&ccu CLK_BUS_SPI3>, <&ccu CLK_SPI3>;
> + clock-names = "ahb", "mod";
> + resets = <&ccu RST_BUS_SPI3>;
> + status = "disabled";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> ccu: clock@...0000 {
> compatible = "allwinner,sun8i-r40-ccu";
> reg = <0x01c20000 0x400>;
> @@ -692,58 +744,6 @@ i2c4: i2c@...c000 {
> #size-cells = <0>;
> };
>
> - spi0: spi@...5000 {
> - compatible = "allwinner,sun8i-r40-spi",
> - "allwinner,sun8i-h3-spi";
> - reg = <0x01c05000 0x1000>;
> - interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
> - clock-names = "ahb", "mod";
> - resets = <&ccu RST_BUS_SPI0>;
> - status = "disabled";
> - #address-cells = <1>;
> - #size-cells = <0>;
> - };
> -
> - spi1: spi@...6000 {
> - compatible = "allwinner,sun8i-r40-spi",
> - "allwinner,sun8i-h3-spi";
> - reg = <0x01c06000 0x1000>;
> - interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
> - clock-names = "ahb", "mod";
> - resets = <&ccu RST_BUS_SPI1>;
> - status = "disabled";
> - #address-cells = <1>;
> - #size-cells = <0>;
> - };
> -
> - spi2: spi@...7000 {
> - compatible = "allwinner,sun8i-r40-spi",
> - "allwinner,sun8i-h3-spi";
> - reg = <0x01c17000 0x1000>;
> - interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&ccu CLK_BUS_SPI2>, <&ccu CLK_SPI2>;
> - clock-names = "ahb", "mod";
> - resets = <&ccu RST_BUS_SPI2>;
> - status = "disabled";
> - #address-cells = <1>;
> - #size-cells = <0>;
> - };
> -
> - spi3: spi@...f000 {
> - compatible = "allwinner,sun8i-r40-spi",
> - "allwinner,sun8i-h3-spi";
> - reg = <0x01c1f000 0x1000>;
> - interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&ccu CLK_BUS_SPI3>, <&ccu CLK_SPI3>;
> - clock-names = "ahb", "mod";
> - resets = <&ccu RST_BUS_SPI3>;
> - status = "disabled";
> - #address-cells = <1>;
> - #size-cells = <0>;
> - };
> -
> gmac: ethernet@...0000 {
> compatible = "allwinner,sun8i-r40-gmac";
> syscon = <&ccu>;
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