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Message-Id: <1583992911-12001-3-git-send-email-ppvk@codeaurora.org>
Date: Thu, 12 Mar 2020 11:31:51 +0530
From: Pradeep P V K <ppvk@...eaurora.org>
To: bjorn.andersson@...aro.org, adrian.hunter@...el.com,
robh+dt@...nel.org, ulf.hansson@...aro.org,
asutoshd@...eaurora.org, stummala@...eaurora.org,
sayalil@...eaurora.org, rampraka@...eaurora.org,
vbadigan@...eaurora.org, sboyd@...nel.org,
georgi.djakov@...aro.org, mka@...omium.org
Cc: linux-mmc@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
agross@...nel.org, linux-mmc-owner@...r.kernel.org,
Pradeep P V K <ppvk@...eaurora.org>
Subject: [RFC v5 2/2] dt-bindings: mmc: sdhci-msm: Add interconnect BW scaling strings
Add interconnect bandwidth scaling supported strings for qcom-sdhci
controller.
Signed-off-by: Pradeep P V K <ppvk@...eaurora.org>
Acked-by: Rob Herring <robh@...nel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@...aro.org>
---
RFC v4 -> v5:
- No changes.
Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
index 5445931..9eafc41 100644
--- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
+++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
@@ -46,6 +46,21 @@ Required properties:
"cal" - reference clock for RCLK delay calibration (optional)
"sleep" - sleep clock for RCLK delay calibration (optional)
+Optional Properties:
+* Following bus parameters are required for interconnect bandwidth scaling:
+- interconnects: Pairs of phandles and interconnect provider specifier
+ to denote the edge source and destination ports of
+ the interconnect path.
+
+- interconnect-names: For sdhc, we have two main paths.
+ 1. Data path : sdhc to ddr
+ 2. Config path : cpu to sdhc
+ For Data interconnect path the name supposed to be
+ is "sdhc-ddr" and for config interconnect path it is
+ "cpu-sdhc".
+ Please refer to Documentation/devicetree/bindings/
+ interconnect/ for more details.
+
Example:
sdhc_1: sdhci@...24900 {
@@ -63,6 +78,9 @@ Example:
clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>;
clock-names = "core", "iface";
+ interconnects = <&qnoc MASTER_SDCC_ID &qnoc SLAVE_DDR_ID>,
+ <&qnoc MASTER_CPU_ID &qnoc SLAVE_SDCC_ID>;
+ interconnect-names = "sdhc-ddr","cpu-sdhc";
};
sdhc_2: sdhci@...a4900 {
--
1.9.1
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