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Message-Id: <1584003692-25523-11-git-send-email-peng.fan@nxp.com>
Date:   Thu, 12 Mar 2020 17:01:32 +0800
From:   peng.fan@....com
To:     shawnguo@...nel.org, s.hauer@...gutronix.de,
        leonard.crestez@....com, sboyd@...nel.org, abel.vesa@....com
Cc:     kernel@...gutronix.de, festevam@...il.com, linux-imx@....com,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        Anson.Huang@....com, daniel.baluta@....com, aford173@...il.com,
        ping.bai@....com, jun.li@....com, l.stach@...gutronix.de,
        andrew.smirnov@...il.com, agx@...xcpu.org, angus@...ea.ca,
        heiko@...ech.de, fugang.duan@....com, linux-clk@...r.kernel.org,
        Peng Fan <peng.fan@....com>
Subject: [PATCH 10/10] clk: imx8mp: mark memrepair clock as critical

From: Peng Fan <peng.fan@....com>

If memrepair root clock in CCM is disabled, the memory repair logic
in HDMIMIX can’t work. So let's mark it as critical clock.

Signed-off-by: Peng Fan <peng.fan@....com>
---
 drivers/clk/imx/clk-imx8mp.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index b4d9db9d5bf1..a7c59d7a40de 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -590,7 +590,7 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
 	hws[IMX8MP_CLK_VPU_G2] = imx8m_clk_hw_composite("vpu_g2", imx8mp_vpu_g2_sels, ccm_base + 0xa180);
 	hws[IMX8MP_CLK_CAN1] = imx8m_clk_hw_composite("can1", imx8mp_can1_sels, ccm_base + 0xa200);
 	hws[IMX8MP_CLK_CAN2] = imx8m_clk_hw_composite("can2", imx8mp_can2_sels, ccm_base + 0xa280);
-	hws[IMX8MP_CLK_MEMREPAIR] = imx8m_clk_hw_composite("memrepair", imx8mp_memrepair_sels, ccm_base + 0xa300);
+	hws[IMX8MP_CLK_MEMREPAIR] = imx8m_clk_hw_composite_critical("memrepair", imx8mp_memrepair_sels, ccm_base + 0xa300);
 	hws[IMX8MP_CLK_PCIE_PHY] = imx8m_clk_hw_composite("pcie_phy", imx8mp_pcie_phy_sels, ccm_base + 0xa380);
 	hws[IMX8MP_CLK_PCIE_AUX] = imx8m_clk_hw_composite("pcie_aux", imx8mp_pcie_aux_sels, ccm_base + 0xa400);
 	hws[IMX8MP_CLK_I2C5] = imx8m_clk_hw_composite("i2c5", imx8mp_i2c5_sels, ccm_base + 0xa480);
-- 
2.16.4

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