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Message-Id: <1584008384-11578-9-git-send-email-peng.fan@nxp.com>
Date: Thu, 12 Mar 2020 18:19:42 +0800
From: peng.fan@....com
To: shawnguo@...nel.org, s.hauer@...gutronix.de,
leonard.crestez@....com, sboyd@...nel.org, abel.vesa@....com
Cc: kernel@...gutronix.de, festevam@...il.com, linux-imx@....com,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
Anson.Huang@....com, daniel.baluta@....com, aford173@...il.com,
ping.bai@....com, jun.li@....com, l.stach@...gutronix.de,
andrew.smirnov@...il.com, agx@...xcpu.org, angus@...ea.ca,
heiko@...ech.de, fugang.duan@....com, linux-clk@...r.kernel.org,
Peng Fan <peng.fan@....com>
Subject: [PATCH V2 08/10] clk: imx: add imx8m_clk_hw_composite_bus
From: Peng Fan <peng.fan@....com>
Introduce imx8m_clk_hw_composite_bus api for bus clk root slice usage.
Because the mux switch sequence issue, we could not reuse Peripheral
Clock Slice code, need use composite specific mux operation.
Signed-off-by: Peng Fan <peng.fan@....com>
---
drivers/clk/imx/clk-composite-8m.c | 5 +++++
drivers/clk/imx/clk.h | 7 +++++++
2 files changed, 12 insertions(+)
diff --git a/drivers/clk/imx/clk-composite-8m.c b/drivers/clk/imx/clk-composite-8m.c
index eae02c151ced..ec28643426c2 100644
--- a/drivers/clk/imx/clk-composite-8m.c
+++ b/drivers/clk/imx/clk-composite-8m.c
@@ -216,6 +216,11 @@ struct clk_hw *imx8m_clk_hw_composite_flags(const char *name,
div->width = PCG_CORE_DIV_WIDTH;
divider_ops = &clk_divider_ops;
mux_ops = &imx8m_clk_composite_mux_ops;
+ } else if (composite_flags & IMX_COMPOSITE_BUS) {
+ div->shift = PCG_PREDIV_SHIFT;
+ div->width = PCG_PREDIV_WIDTH;
+ divider_ops = &imx8m_clk_composite_divider_ops;
+ mux_ops = &imx8m_clk_composite_mux_ops;
} else {
div->shift = PCG_PREDIV_SHIFT;
div->width = PCG_PREDIV_WIDTH;
diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h
index f074dd8ec42e..d4ea1609bcb7 100644
--- a/drivers/clk/imx/clk.h
+++ b/drivers/clk/imx/clk.h
@@ -478,6 +478,7 @@ struct clk_hw *imx_clk_hw_cpu(const char *name, const char *parent_name,
struct clk *step);
#define IMX_COMPOSITE_CORE BIT(0)
+#define IMX_COMPOSITE_BUS BIT(1)
struct clk_hw *imx8m_clk_hw_composite_flags(const char *name,
const char * const *parent_names,
@@ -486,6 +487,12 @@ struct clk_hw *imx8m_clk_hw_composite_flags(const char *name,
u32 composite_flags,
unsigned long flags);
+#define imx8m_clk_hw_composite_bus(name, parent_names, reg) \
+ imx8m_clk_hw_composite_flags(name, parent_names, \
+ ARRAY_SIZE(parent_names), reg, \
+ IMX_COMPOSITE_BUS, \
+ CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE)
+
#define imx8m_clk_hw_composite_core(name, parent_names, reg) \
imx8m_clk_hw_composite_flags(name, parent_names, \
ARRAY_SIZE(parent_names), reg, \
--
2.16.4
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