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Message-Id: <20200313231024.17601-2-kim.phillips@amd.com>
Date: Fri, 13 Mar 2020 18:10:23 -0500
From: Kim Phillips <kim.phillips@....com>
To: Peter Zijlstra <peterz@...radead.org>,
Ingo Molnar <mingo@...nel.org>, Ingo Molnar <mingo@...hat.com>,
Thomas Gleixner <tglx@...utronix.de>,
Borislav Petkov <bp@...en8.de>,
Kim Phillips <kim.phillips@....com>
Cc: Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Arnaldo Carvalho de Melo <acme@...nel.org>,
"H. Peter Anvin" <hpa@...or.com>, Jiri Olsa <jolsa@...hat.com>,
Mark Rutland <mark.rutland@....com>,
Michael Petlan <mpetlan@...hat.com>,
Namhyung Kim <namhyung@...nel.org>,
Stephane Eranian <eranian@...gle.com>,
linux-kernel@...r.kernel.org, x86@...nel.org
Subject: [PATCH 2/3 v2] perf/amd/uncore: Make L3 thread mask code more readable
Convert the l3_thread_slice_mask function to use the more
readable topology_* helper functions, more intuitive
variable names like shift and thread_mask, and BIT_ULL.
Signed-off-by: Kim Phillips <kim.phillips@....com>
Cc: Alexander Shishkin <alexander.shishkin@...ux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@...nel.org>
Cc: Borislav Petkov <bp@...en8.de>
Cc: "H. Peter Anvin" <hpa@...or.com>
Cc: Ingo Molnar <mingo@...nel.org>
Cc: Ingo Molnar <mingo@...hat.com>
Cc: Jiri Olsa <jolsa@...hat.com>
Cc: Mark Rutland <mark.rutland@....com>
Cc: Michael Petlan <mpetlan@...hat.com>
Cc: Namhyung Kim <namhyung@...nel.org>
Cc: Peter Zijlstra <peterz@...radead.org>
Cc: Stephane Eranian <eranian@...gle.com>
Cc: Thomas Gleixner <tglx@...utronix.de>
Cc: linux-kernel@...r.kernel.org
Cc: x86@...nel.org
---
v2: new this series based on splitting into two parts,
this one being the one with the non-move related changes,
based on Boris' review comments:
https://lkml.org/lkml/2020/3/12/581
arch/x86/events/amd/uncore.c | 13 ++++++++-----
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/arch/x86/events/amd/uncore.c b/arch/x86/events/amd/uncore.c
index dcdac001431e..b622e59ccdd0 100644
--- a/arch/x86/events/amd/uncore.c
+++ b/arch/x86/events/amd/uncore.c
@@ -185,13 +185,16 @@ static void amd_uncore_del(struct perf_event *event, int flags)
*/
static u64 l3_thread_slice_mask(int cpu)
{
- int thread = 2 * (cpu_data(cpu).cpu_core_id % 4);
+ unsigned int shift, thread = 0;
+ u64 thread_mask, core = topology_core_id(cpu);
- if (smp_num_siblings > 1)
- thread += cpu_data(cpu).apicid & 1;
+ if (topology_smt_supported() && !topology_is_primary_thread(cpu))
+ thread = 1;
- return (1ULL << (AMD64_L3_THREAD_SHIFT + thread) &
- AMD64_L3_THREAD_MASK) | AMD64_L3_SLICE_MASK;
+ shift = AMD64_L3_THREAD_SHIFT + 2 * (core % 4) + thread;
+ thread_mask = BIT_ULL(shift);
+
+ return AMD64_L3_SLICE_MASK | thread_mask;
}
static int amd_uncore_event_init(struct perf_event *event)
--
2.25.1
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