lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <80c837f0-b708-5f5a-ae65-cd20ae71a2d6@linux.intel.com>
Date:   Fri, 13 Mar 2020 16:36:22 +0800
From:   Dilip Kota <eswara.kota@...ux.intel.com>
To:     Rob Herring <robh@...nel.org>
Cc:     "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        devicetree@...r.kernel.org, Kishon Vijay Abraham I <kishon@...com>,
        Andy Shevchenko <andriy.shevchenko@...el.com>,
        cheol.yong.kim@...el.com, chuanhua.lei@...ux.intel.com,
        qi-ming.wu@...el.com, yixin.zhu@...el.com
Subject: Re: [PATCH v4 2/3] dt-bindings: phy: Add YAML schemas for Intel
 Combophy

Hi Rob,

On 3/4/2020 5:16 PM, Dilip Kota wrote:
>
> On 3/4/2020 12:26 AM, Rob Herring wrote:
>> On Tue, Mar 3, 2020 at 3:24 AM Dilip Kota 
>> <eswara.kota@...ux.intel.com> wrote:
>>>
>>> On 3/3/2020 9:50 AM, Rob Herring wrote:
>>>> On Mon, Mar 02, 2020 at 04:43:24PM +0800, Dilip Kota wrote:
>>>>> Combophy subsystem provides PHY support to various
>>>>> controllers, viz. PCIe, SATA and EMAC.
>>>>> Adding YAML schemas for the same.
...
>>>>> +  - |
>>>>> +    #include <dt-bindings/phy/phy-intel-combophy.h>
>>>>> +    combophy@...00000 {
>>>>> +        compatible = "intel,combophy-lgm", "intel,combo-phy";
>>>>> +        clocks = <&cgu0 1>;
>>>>> +        reg = <0xd0a00000 0x40000>,
>>>>> +              <0xd0a40000 0x1000>;
>>>>> +        reg-names = "core", "app";
>>>>> +        resets = <&rcu0 0x50 6>,
>>>>> +                 <&rcu0 0x50 17>;
>>>>> +        reset-names = "phy", "core";
>>>>> +        intel,syscfg = <&sysconf 0>;
>>>>> +        intel,hsio = <&hsiol 0>;
>>>>> +        intel,phy-mode = <COMBO_PHY_PCIE>;
>>>>> +
>>>>> +        phy@0 {
>>>> You need a 'reg' property to go with a unit-address.
>>>>
>>>> Really, I'd just simplify this to make parent 'resets' be 4 entries 
>>>> and
>>>> put '#phy-cells = <1>;' in the parent. Then you don't need these child
>>>> nodes.
>>> If child nodes are not present, use case like PCIe controller-0 using
>>> phy@0 and PCIe controller-1 using phy@1 wont be possible.
>> Yes, it will be.
>>
>> For controller-0:
>> phys = <&phy 0>;
>>
>> For controller-1:
>> phys = <&phy 1>;
>
> OH got it, arg cell can be utilized for PHY id.
> I started working on your suggestion in simplifying it, but below 
> point is haunting while doing the changes. So felt to check with you 
> whether the better one is going with existing DT node or the one 
> without child nodes!.
>      Existing DT node skeleton, replicates hardware design ComboPhy 
> with 2 PHYs. (ComboPhy as parent node and 2PHYs as child nodes)
In the patchwork, i see the patch state is 'Change Requested', so felt 
to keep a remainder mail for your inputs on above query.
I have waiting to push the appropriate code changes based on your comment.

Thanks,
Dilip

>
> Regards,
> Dilip
>
>>
>> Rob

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ