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Message-ID: <1584092066-24425-2-git-send-email-henryc.chen@mediatek.com>
Date: Fri, 13 Mar 2020 17:34:14 +0800
From: Henry Chen <henryc.chen@...iatek.com>
To: Georgi Djakov <georgi.djakov@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>,
Viresh Kumar <vireshk@...nel.org>,
Stephen Boyd <swboyd@...omium.org>,
Ryan Case <ryandcase@...omium.org>,
Mark Brown <broonie@...nel.org>
CC: Mark Rutland <mark.rutland@....com>,
Nicolas Boichat <drinkcat@...gle.com>,
Fan Chen <fan.chen@...iatek.com>,
James Liao <jamesjj.liao@...iatek.com>,
Arvin Wang <arvin.wang@...iatek.com>,
Mike Turquette <mturquette@...aro.org>,
<devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <linux-pm@...r.kernel.org>,
<srv_heupstream@...iatek.com>,
Henry Chen <henryc.chen@...iatek.com>
Subject: [PATCH V4 01/13] dt-bindings: soc: Add dvfsrc driver bindings
Document the binding for enabling dvfsrc on MediaTek SoC.
Signed-off-by: Henry Chen <henryc.chen@...iatek.com>
Reviewed-by: Rob Herring <robh@...nel.org>
---
.../devicetree/bindings/soc/mediatek/dvfsrc.txt | 23 ++++++++++++++++++++++
include/dt-bindings/soc/mtk,dvfsrc.h | 14 +++++++++++++
2 files changed, 37 insertions(+)
create mode 100644 Documentation/devicetree/bindings/soc/mediatek/dvfsrc.txt
create mode 100644 include/dt-bindings/soc/mtk,dvfsrc.h
diff --git a/Documentation/devicetree/bindings/soc/mediatek/dvfsrc.txt b/Documentation/devicetree/bindings/soc/mediatek/dvfsrc.txt
new file mode 100644
index 0000000..7f43499
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/mediatek/dvfsrc.txt
@@ -0,0 +1,23 @@
+MediaTek DVFSRC
+
+The Dynamic Voltage and Frequency Scaling Resource Collector (DVFSRC) is a
+HW module which is used to collect all the requests from both software and
+hardware and turn into the decision of minimum operating voltage and minimum
+DRAM frequency to fulfill those requests.
+
+Required Properties:
+- compatible: Should be one of the following
+ - "mediatek,mt8183-dvfsrc": For MT8183 SoC
+- reg: Address range of the DVFSRC unit
+- clock-names: Must include the following entries:
+ "dvfsrc": DVFSRC module clock
+- clocks: Must contain an entry for each entry in clock-names.
+
+Example:
+
+ dvfsrc@...12000 {
+ compatible = "mediatek,mt8183-dvfsrc";
+ reg = <0 0x10012000 0 0x1000>;
+ clocks = <&infracfg CLK_INFRA_DVFSRC>;
+ clock-names = "dvfsrc";
+ };
diff --git a/include/dt-bindings/soc/mtk,dvfsrc.h b/include/dt-bindings/soc/mtk,dvfsrc.h
new file mode 100644
index 0000000..a522488
--- /dev/null
+++ b/include/dt-bindings/soc/mtk,dvfsrc.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Copyright (c) 2018 MediaTek Inc.
+ */
+
+#ifndef _DT_BINDINGS_POWER_MTK_DVFSRC_H
+#define _DT_BINDINGS_POWER_MTK_DVFSRC_H
+
+#define MT8183_DVFSRC_LEVEL_1 1
+#define MT8183_DVFSRC_LEVEL_2 2
+#define MT8183_DVFSRC_LEVEL_3 3
+#define MT8183_DVFSRC_LEVEL_4 4
+
+#endif /* _DT_BINDINGS_POWER_MTK_DVFSRC_H */
--
1.9.1
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