[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <1584098121-18075-3-git-send-email-akashast@codeaurora.org>
Date: Fri, 13 Mar 2020 16:45:21 +0530
From: Akash Asthana <akashast@...eaurora.org>
To: robh+dt@...nel.org, agross@...nel.org, mark.rutland@....com
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, mgautam@...eaurora.org,
rojay@...eaurora.org, skakit@...eaurora.org,
Akash Asthana <akashast@...eaurora.org>
Subject: [PATCH V2 2/2] dt-bindings: spi: Add interconnect binding for QSPI
Add documentation for the interconnect and interconnect-names
properties for QSPI.
Signed-off-by: Akash Asthana <akashast@...eaurora.org>
---
Changes in V2:
- Added minItems = 1 for interconnect property
Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml b/Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml
index 9582d37..0cf470e 100644
--- a/Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml
+++ b/Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml
@@ -40,6 +40,15 @@ properties:
- description: AHB clock
- description: QSPI core clock
+ interconnects:
+ minItems: 1
+ maxItems: 2
+
+ interconnect-names:
+ items:
+ - const: qspi-config
+ - const: qspi-memory
+
required:
- compatible
- reg
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\na Linux Foundation Collaborative Project
Powered by blists - more mailing lists