linux-kernel - Re: [PATCH] arm64: dts: imx8mq-phanbell: Fix Ethernet PHY post-reset duration

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Message-ID: <CAOMZO5CNv3zzgDEK6R=K4f04NyJKHeSb_4sj8ynF_be1tKeV7Q@mail.gmail.com>
Date:   Fri, 13 Mar 2020 13:49:33 -0300
From:   Fabio Estevam <festevam@...il.com>
To:     Alifer Moraes <alifer.wsdm@...il.com>
Cc:     Rob Herring <robh+dt@...nel.org>, Shawn Guo <shawnguo@...nel.org>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        Marco Franchi <marco.franchi@....com>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        linux-kernel <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] arm64: dts: imx8mq-phanbell: Fix Ethernet PHY post-reset duration

On Fri, Mar 13, 2020 at 1:32 PM Fabio Estevam <festevam@...il.com> wrote:
>
> Hi Alifer,
>
> On Fri, Mar 6, 2020 at 7:41 AM Alifer Moraes <alifer.wsdm@...il.com> wrote:
> >
> > i.MX8MQ Phanbell board uses Realtek RTL8211FD as Ethernet PHY.
> > Its datasheet states that the proper post reset duration should be at least 50 ms.
>
> The datasheet I found in the web states:
>
> "The RTL8211F(I)/RTL8211FD(I) has a PHYRSTB pin to reset the chip. For
> a complete PHY reset, this pin must be asserted low for at least 10ms
> (Tgap in Figure 9) for the internal regulator. Wait for a further 30ms
> (for internal circuits settling time) before accessing the PHY
> register"
>
> Where does the 50ms requirement come from? Do you have an updated
> datasheet that says 50ms instead?

Just found this one:
https://datasheet.lcsc.com/szlcsc/1909021205_Realtek-Semicon-RTL8211F-CG_C187932.pdf

Which says "Wait for at least 50ms* (for internal circuits settling
time) before accessing the PHY register.", so your patch is correct,
thanks.

This also fixes Ethernet in U-Boot, so:

Reviewed-by: Fabio Estevam <festevam@...il.com>