linux-kernel - Re: [PATCH v6 06/12] soc: aspeed: Add XDMA Engine Driver

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Message-ID: <CACPK8XcD5O0dwEOSHqWfCu38B96JkdbcvzCuJhep+PXF6foC=g@mail.gmail.com>
Date:   Mon, 16 Mar 2020 04:49:55 +0000
From:   Joel Stanley <joel@....id.au>
To:     Arnd Bergmann <arnd@...db.de>
Cc:     Eddie James <eajames@...ux.ibm.com>,
        linux-aspeed <linux-aspeed@...ts.ozlabs.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        DTML <devicetree@...r.kernel.org>,
        Mark Rutland <mark.rutland@....com>,
        Jason Cooper <jason@...edaemon.net>,
        Marc Zyngier <maz@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Andrew Jeffery <andrew@...id.au>
Subject: Re: [PATCH v6 06/12] soc: aspeed: Add XDMA Engine Driver

On Mon, 10 Feb 2020 at 17:10, Eddie James <eajames@...ux.vnet.ibm.com> wrote:
>
>
> On 2/10/20 10:35 AM, Arnd Bergmann wrote:
> > On Wed, Jan 15, 2020 at 10:31 PM Eddie James <eajames@...ux.ibm.com> wrote:
> >> The XDMA engine embedded in the AST2500 and AST2600 SOCs performs PCI
> >> DMA operations between the SOC (acting as a BMC) and a host processor
> >> in a server.
> >>
> >> This commit adds a driver to control the XDMA engine and adds functions
> >> to initialize the hardware and memory and start DMA operations.
> >>
> >> Signed-off-by: Eddie James <eajames@...ux.ibm.com>
> > Hi Eddie,
> >
> > I'm missing the bigger picture in the description here, how does this fit into
> > the PCIe endpoint framework and the dmaengine subsystem?
>
>
> Hi,
>
> It doesn't fit into the PCIe endpoint framework. The XDMA engine
> abstracts all the PCIe details away so the BMC cannot configure any of
> the things the PCIe endpoint exposes.
>
> It also doesn't fit into the dmaengine subsystem due to the restriction
> on the ast2500 (and maybe the ast2600) that the XDMA engine can only
> access certain areas of physical memory. Also problematic would be
> pausing/resuming/terminating transfers because the XDMA engine can't do
> those things.
>
>
> >
> > Does the AST2500 show up as a PCIe device in the host, or do you just
> > inject DMAs into the host and hope that bypasses the IOMMU?
> > If it shows up as an endpoint, how does the endpoint driver link into the
> > dma driver?
>
>
> The AST2500 and AST2600 have two PCIe devices on them, so these will
> show up on the host if the BMC enables both of them. Either or both can
> also be disabled and therefore will not show up. On the host side, in
> order to receive DMA transfers, its simply a matter of registering a PCI
> device driver and allocating some coherent DMA.... Not sure about the
> details of endpoints/dma client driver?
>
>
> Hopefully this answers your questions. Thanks,

Arnd, did you have further questions about this driver?