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Message-Id: <20200317135740.19412-6-robert.foss@linaro.org>
Date: Tue, 17 Mar 2020 14:57:39 +0100
From: Robert Foss <robert.foss@...aro.org>
To: agross@...nel.org, bjorn.andersson@...aro.org, robh+dt@...nel.org,
mark.rutland@....com, catalin.marinas@....com, will@...nel.org,
shawnguo@...nel.org, olof@...om.net, maxime@...no.tech,
Anson.Huang@....com, dinguyen@...nel.org, leonard.crestez@....com,
marcin.juszkiewicz@...aro.org, linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
Loic Poulain <loic.poulain@...aro.org>
Cc: Robert Foss <robert.foss@...aro.org>
Subject: [v2 5/6] arm64: dts: sdm845-db845c: Add ov8856 & ov7251 camera nodes
Enable the ov8856 main camera and the ov7251 b/w tracking camera
used on the Qualcomm RB3 kit.
Currently the camera nodes have not yet been attached to an to a
CSI2 endpoint, since no driver currently supports the ISP that the the
SDM845/db845c ships with.
Signed-off-by: Robert Foss <robert.foss@...aro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@...aro.org>
---
Changes since v1:
- Move cam0_ pinctrls subnodes into the first pm8998_gpio reference
- Remove accidentally committed &tlmn node subnodes
- Remove redundant tlmm pinctrl subnodes
- Fix pinctrl subnode identation
- Remove accidentally committed &tlmn node subnodes
- Replace underscores in node names
- Reference cci i2c buses by labe
- Change camera node names from camX@YY to camera@YY
- Remove camera@10 comment about I2C addresses
- Replace GPIO_ACTIVE_HIGH with 0 in camera nodes
- Removed extra newline
- Remove comment about not being available always
- Disable cameras as CSI driver is missing
- Fix factual error in comment about vreg_s4a_1p8
- Remove dummy regulator cam3_vddd_1v2
arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 178 +++++++++++++++++++++
1 file changed, 178 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
index efb0086e2aa1..ed71278196f2 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
+++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
@@ -110,6 +110,40 @@
// enable-active-high;
};
+ cam0_dvdd_1v2: reg_cam0_dvdd_1v2 {
+ compatible = "regulator-fixed";
+ regulator-name = "CAM0_DVDD_1V2";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ enable-active-high;
+ gpio = <&pm8998_gpio 12 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&cam0_dvdd_1v2_en_default>;
+ vin-supply = <&vbat>;
+ };
+
+ cam0_avdd_2v8: reg_cam0_avdd_2v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "CAM0_AVDD_2V8";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ enable-active-high;
+ gpio = <&pm8998_gpio 10 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&cam0_avdd_2v8_en_default>;
+ vin-supply = <&vbat>;
+ };
+
+ /* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */
+ cam3_avdd_2v8: reg_cam3_avdd_2v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "CAM3_AVDD_2V8";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-always-on;
+ vin-supply = <&vbat>;
+ };
+
pcie0_3p3v_dual: vldo-3v3-regulator {
compatible = "regulator-fixed";
regulator-name = "VLDO_3V3";
@@ -393,6 +427,24 @@
"OPTION2",
"PM845_SLB";
+ cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en {
+ pins = "gpio12";
+ function = "normal";
+
+ bias-pull-up;
+ drive-push-pull;
+ qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
+ };
+
+ cam0_avdd_2v8_en_default: cam0-avdd-2v8-en {
+ pins = "gpio10";
+ function = "normal";
+
+ bias-pull-up;
+ drive-push-pull;
+ qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
+ };
+
vol_up_pin_a: vol-up-active {
pins = "gpio6";
function = "normal";
@@ -434,6 +486,42 @@
};
&tlmm {
+ cam0_default: cam0_default {
+ rst {
+ pins = "gpio9";
+ function = "gpio";
+
+ drive-strength = <16>;
+ bias-disable;
+ };
+
+ mclk0 {
+ pins = "gpio13";
+ function = "cam_mclk";
+
+ drive-strength = <16>;
+ bias-disable;
+ };
+ };
+
+ cam3_default: cam3_default {
+ rst {
+ function = "gpio";
+ pins = "gpio21";
+
+ drive-strength = <16>;
+ bias-disable;
+ };
+
+ mclk3 {
+ function = "cam_mclk";
+ pins = "gpio16";
+
+ drive-strength = <16>;
+ bias-disable;
+ };
+ };
+
pcie0_pwren_state: pcie0-pwren {
pins = "gpio90";
function = "gpio";
@@ -612,6 +700,96 @@
};
};
+&pm8998_gpio {
+
+};
+
&cci {
status = "ok";
};
+
+&cci_i2c0 {
+ camera@10 {
+ compatible = "ovti,ov8856";
+ reg = <0x10>;
+
+ // CAM0_RST_N
+ reset-gpios = <&tlmm 9 0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&cam0_default>;
+ gpios = <&tlmm 13 0>,
+ <&tlmm 9 0>;
+
+ clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
+ clock-names = "xvclk";
+ clock-frequency = <19200000>;
+
+ /* The &vreg_s4a_1p8 trace is powered on as a,
+ * so it is represented by a fixed regulator.
+ *
+ * The 2.8V vdda-supply and 1.2V vddd-supply regulators
+ * both have to be enabled through the power management
+ * gpios.
+ */
+ power-domains = <&clock_camcc TITAN_TOP_GDSC>;
+
+ dovdd-supply = <&vreg_lvs1a_1p8>;
+ avdd-supply = <&cam0_avdd_2v8>;
+ dvdd-supply = <&cam0_dvdd_1v2>;
+
+ status = "disable";
+
+ port {
+ ov8856_ep: endpoint {
+ clock-lanes = <1>;
+ link-frequencies = /bits/ 64
+ <360000000 180000000>;
+ data-lanes = <1 2 3 4>;
+// remote-endpoint = <&csiphy0_ep>;
+ };
+ };
+ };
+};
+
+&cci_i2c1 {
+ camera@60 {
+ compatible = "ovti,ov7251";
+
+ // I2C address as per ov7251.txt linux documentation
+ reg = <0x60>;
+
+ // CAM3_RST_N
+ enable-gpios = <&tlmm 21 0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&cam3_default>;
+ gpios = <&tlmm 16 0>,
+ <&tlmm 21 0>;
+
+ clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
+ clock-names = "xclk";
+ clock-frequency = <24000000>;
+
+ /* The &vreg_s4a_1p8 trace always powered on.
+ *
+ * The 2.8V vdda-supply regulator is enabled when the
+ * vreg_s4a_1p8 trace is pulled high.
+ * It too is represented by a fixed regulator.
+ *
+ * No 1.2V vddd-supply regulator is used.
+ */
+ power-domains = <&clock_camcc TITAN_TOP_GDSC>;
+
+ vdddo-supply = <&vreg_lvs1a_1p8>;
+ vdda-supply = <&cam3_avdd_2v8>;
+
+ status = "disable";
+
+ port {
+ ov7251_ep: endpoint {
+ clock-lanes = <1>;
+ data-lanes = <0 1>;
+// remote-endpoint = <&csiphy3_ep>;
+ };
+ };
+ };
+};
--
2.20.1
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