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Message-ID: <dcc9899c-f5af-9a4f-3ac2-f37fd8b930f7@redhat.com>
Date: Tue, 17 Mar 2020 09:27:22 +0100
From: Paolo Bonzini <pbonzini@...hat.com>
To: Zhenyu Wang <zhenyuw@...ux.intel.com>
Cc: kvm@...r.kernel.org, linux-kernel@...r.kernel.org,
"Zhong, Yang" <yang.zhong@...el.com>
Subject: Re: [PATCH] KVM: x86: Expose AVX512 VP2INTERSECT in cpuid for TGL
On 17/03/20 07:55, Zhenyu Wang wrote:
> On Tigerlake new AVX512 VP2INTERSECT feature is available.
> This would expose it for KVM supported cpuid.
>
> Cc: "Zhong, Yang" <yang.zhong@...el.com>
> Signed-off-by: Zhenyu Wang <zhenyuw@...ux.intel.com>
> ---
> arch/x86/kvm/cpuid.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
> index b1c469446b07..b4e25ff6ab0a 100644
> --- a/arch/x86/kvm/cpuid.c
> +++ b/arch/x86/kvm/cpuid.c
> @@ -374,7 +374,7 @@ static inline void do_cpuid_7_mask(struct kvm_cpuid_entry2 *entry, int index)
> const u32 kvm_cpuid_7_0_edx_x86_features =
> F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(SPEC_CTRL) |
> F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) |
> - F(MD_CLEAR);
> + F(MD_CLEAR) | F(AVX512_VP2INTERSECT);
>
> /* cpuid 7.1.eax */
> const u32 kvm_cpuid_7_1_eax_x86_features =
>
Hi Zhenyu,
please rebase - the CPUID mechanism is completely rewritten in kvm/queue.
Thanks,
Paolo
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