linux-kernel - Re: [PATCH v13 1/6] dt-bindings: media: add pclk-sample dual edge property

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Message-ID: <CAAOTY_8B+AS9uUvazfg_OtvnaW8kJVbyNB-FVUYh5MPMuJnf8g@mail.gmail.com>
Date:   Tue, 17 Mar 2020 21:33:46 +0800
From:   Chun-Kuang Hu <chunkuang.hu@...nel.org>
To:     Neil Armstrong <narmstrong@...libre.com>,
        Jitao Shi <jitao.shi@...iatek.com>
Cc:     Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Daniel Vetter <daniel@...ll.ch>,
        David Airlie <airlied@...ux.ie>,
        dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org, srv_heupstream@...iatek.com,
        huijuan.xie@...iatek.com, stonea168@....com,
        cawa.cheng@...iatek.com, linux-mediatek@...ts.infradead.org,
        yingjoe.chen@...iatek.com, eddie.huang@...iatek.com,
        linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v13 1/6] dt-bindings: media: add pclk-sample dual edge property

Hi, Jitao:

I agree with Neil, so please base on Boris' effort to negotiate with bridge.

Regards,
Chun-Kuang Hu

Neil Armstrong <narmstrong@...libre.com> 於 2020年3月11日 週三 下午9:53寫道：

>
> Hi,
>
> On 11/03/2020 08:18, Jitao Shi wrote:
> > Some chips's sample mode are rising, falling and dual edge (both
> > falling and rising edge).
> > Extern the pclk-sample property to support dual edge.
> >
> > Acked-by: Rob Herring <robh@...nel.org>
> > Reviewed-by: CK Hu <ck.hu@...iatek.com>
> > Signed-off-by: Jitao Shi <jitao.shi@...iatek.com>
> > ---
> >  Documentation/devicetree/bindings/media/video-interfaces.txt | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/media/video-interfaces.txt b/Documentation/devicetree/bindings/media/video-interfaces.txt
> > index f884ada0bffc..da9ad24935db 100644
> > --- a/Documentation/devicetree/bindings/media/video-interfaces.txt
> > +++ b/Documentation/devicetree/bindings/media/video-interfaces.txt
> > @@ -118,8 +118,8 @@ Optional endpoint properties
> >  - data-enable-active: similar to HSYNC and VSYNC, specifies the data enable
> >    signal polarity.
> >  - field-even-active: field signal level during the even field data transmission.
> > -- pclk-sample: sample data on rising (1) or falling (0) edge of the pixel clock
> > -  signal.
> > +- pclk-sample: sample data on rising (1), falling (0) or both rising and
> > +  falling (2) edge of the pixel clock signal.
> >  - sync-on-green-active: active state of Sync-on-green (SoG) signal, 0/1 for
> >    LOW/HIGH respectively.
> >  - data-lanes: an array of physical data lane indexes. Position of an entry
> >
>
> This changes the bus format, but we recently introduced a bus format negociation
> between bridges to avoid adding such properties into DT, and make bus format setup
> dynamic between an encoder and a bridge.
>
> It would be great to use that instead.
>
> Neil
> _______________________________________________
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> dri-devel@...ts.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel

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