[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20200318175709.GD94111@arrakis.emea.arm.com>
Date: Wed, 18 Mar 2020 17:57:09 +0000
From: Catalin Marinas <catalin.marinas@....com>
To: Rémi Denis-Courmont <remi@...lab.net>
Cc: will@...nel.org, linux-arm-kernel@...ts.infradead.org,
mark.rutland@....com, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/3] arm64: clean up trampoline vector loads
On Mon, Mar 16, 2020 at 02:40:44PM +0200, Rémi Denis-Courmont wrote:
> From: Rémi Denis-Courmont <remi.denis.courmont@...wei.com>
>
> This switches from custom instruction patterns to the regular large
> memory model sequence with ADRP and LDR. In doing so, the ADD
> instruction can be eliminated in the SDEI handler, and the code no
> longer assumes that the trampoline vectors and the vectors address both
> start on a page boundary.
>
> Signed-off-by: Rémi Denis-Courmont <remi.denis.courmont@...wei.com>
I queued the 3 trampoline patches for 5.7. Thanks.
--
Catalin
Powered by blists - more mailing lists