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Message-Id: <20200320183455.21311-8-ansuelsmth@gmail.com>
Date: Fri, 20 Mar 2020 19:34:50 +0100
From: Ansuel Smith <ansuelsmth@...il.com>
To: Stanimir Varbanov <svarbanov@...sol.com>
Cc: Ansuel Smith <ansuelsmth@...il.com>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Andrew Murray <amurray@...goodpenguin.co.uk>,
Philipp Zabel <p.zabel@...gutronix.de>,
linux-arm-msm@...r.kernel.org, linux-pci@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: [PATCH 08/12] devicetree: bindings: pci: add phy-tx0-term-offset to qcom,pcie
Document phy-tx0-term-offset propriety to qcom pcie driver
Signed-off-by: Ansuel Smith <ansuelsmth@...il.com>
---
Documentation/devicetree/bindings/pci/qcom,pcie.txt | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.txt b/Documentation/devicetree/bindings/pci/qcom,pcie.txt
index 6efcef040741..8c1d014f37b0 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie.txt
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie.txt
@@ -254,6 +254,12 @@
- "perst-gpios" PCIe endpoint reset signal line
- "wake-gpios" PCIe endpoint wake signal line
+- phy-tx0-term-offset:
+ Usage: optional
+ Value type: <u32>
+ Definition: If not defined is 0. In ipq806x is set to 7. In newer
+ revision (v2.0) the offset is zero.
+
* Example for ipq/apq8064
pcie@...00000 {
compatible = "qcom,pcie-apq8064", "qcom,pcie-ipq8064", "snps,dw-pcie";
@@ -293,6 +299,7 @@
reset-names = "axi", "ahb", "por", "pci", "phy", "ext";
pinctrl-0 = <&pcie_pins_default>;
pinctrl-names = "default";
+ phy-tx0-term-offset = <7>;
};
* Example for apq8084
--
2.25.1
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