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Message-ID: <CAK8P3a0XrYGYBQ_hTKF4fVBr7DDZsLnR+8o=09cig_gAje=v3w@mail.gmail.com>
Date: Fri, 20 Mar 2020 18:00:51 +0100
From: Arnd Bergmann <arnd@...db.de>
To: Guru Das Srinagesh <gurus@...eaurora.org>
Cc: Linux PWM List <linux-pwm@...r.kernel.org>,
Thierry Reding <thierry.reding@...il.com>,
Uwe Kleine-König
<u.kleine-koenig@...gutronix.de>,
Subbaraman Narayanamurthy <subbaram@...eaurora.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
linux-clk <linux-clk@...r.kernel.org>,
David Laight <David.Laight@...lab.com>
Subject: Re: [PATCH v11 11/12] clk: pwm: Assign u64 divisor to unsigned int
before use
On Fri, Mar 20, 2020 at 2:42 AM Guru Das Srinagesh <gurus@...eaurora.org> wrote:
>
> Since the PWM framework is switching struct pwm_args.period's datatype
> to u64, prepare for this transition by assigning the 64-bit divisor to
> an unsigned int variable to use as the divisor. This is being done
> because the divisor is a 32-bit constant and the quotient will be zero
> if the divisor exceeds 2^32.
>
> Cc: Michael Turquette <mturquette@...libre.com>
> Cc: Stephen Boyd <sboyd@...nel.org>
> Cc: linux-clk@...r.kernel.org
> Cc: David Laight <David.Laight@...LAB.COM>
>
> Reported-by: kbuild test robot <lkp@...el.com>
> Signed-off-by: Guru Das Srinagesh <gurus@...eaurora.org>
> ---
> drivers/clk/clk-pwm.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/clk/clk-pwm.c b/drivers/clk/clk-pwm.c
> index 87fe0b0e..c0b5da3 100644
> --- a/drivers/clk/clk-pwm.c
> +++ b/drivers/clk/clk-pwm.c
> @@ -72,6 +72,7 @@ static int clk_pwm_probe(struct platform_device *pdev)
> struct pwm_device *pwm;
> struct pwm_args pargs;
> const char *clk_name;
> + unsigned int period;
> int ret;
>
> clk_pwm = devm_kzalloc(&pdev->dev, sizeof(*clk_pwm), GFP_KERNEL);
> @@ -88,8 +89,9 @@ static int clk_pwm_probe(struct platform_device *pdev)
> return -EINVAL;
> }
>
> + period = pargs.period;
> if (of_property_read_u32(node, "clock-frequency", &clk_pwm->fixed_rate))
> - clk_pwm->fixed_rate = NSEC_PER_SEC / pargs.period;
> + clk_pwm->fixed_rate = NSEC_PER_SEC / period;
>
> if (pargs.period != NSEC_PER_SEC / clk_pwm->fixed_rate &&
> pargs.period != DIV_ROUND_UP(NSEC_PER_SEC, clk_pwm->fixed_rate)) {
Doesn't this one need a check for "pargs.period>UINT_MAX" or
"pargs.period > NSEC_PER_SEC"?
It looks like truncating the 64-bit value to a 32-bit type can result in
unexpected behavior.
Arnd
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