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Message-ID: <20200321121621.1600-4-yezhenyu2@huawei.com>
Date: Sat, 21 Mar 2020 20:16:20 +0800
From: Zhenyu Ye <yezhenyu2@...wei.com>
To: <will@...nel.org>, <mark.rutland@....com>,
<catalin.marinas@....com>, <aneesh.kumar@...ux.ibm.com>,
<maz@...nel.org>, <steven.price@....com>, <broonie@...nel.org>,
<guohanjun@...wei.com>
CC: <yezhenyu2@...wei.com>, <linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <linux-arch@...r.kernel.org>,
<linux-mm@...ck.org>, <arm@...nel.org>, <xiexiangyou@...wei.com>,
<prime.zeng@...ilicon.com>, <zhangshaokun@...ilicon.com>
Subject: [RFC PATCH v3 3/4] arm64: tlb: Use translation level hint in vm_flags
This patch used the VM_LEVEL flags in vma->vm_flags to set the
TTL field in tlbi instruction.
Signed-off-by: Zhenyu Ye <yezhenyu2@...wei.com>
---
arch/arm64/include/asm/mmu.h | 2 ++
arch/arm64/include/asm/tlbflush.h | 14 ++++++++------
arch/arm64/mm/mmu.c | 14 ++++++++++++++
3 files changed, 24 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/include/asm/mmu.h b/arch/arm64/include/asm/mmu.h
index e4d862420bb4..b3f410fee512 100644
--- a/arch/arm64/include/asm/mmu.h
+++ b/arch/arm64/include/asm/mmu.h
@@ -88,6 +88,8 @@ extern void create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys,
extern void *fixmap_remap_fdt(phys_addr_t dt_phys, int *size, pgprot_t prot);
extern void mark_linear_text_alias_ro(void);
extern bool kaslr_requires_kpti(void);
+extern unsigned int get_vma_level(struct vm_area_struct *vma);
+
#define INIT_MM_CONTEXT(name) \
.pgd = init_pg_dir,
diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h
index d141c080e494..93bb09fdfafd 100644
--- a/arch/arm64/include/asm/tlbflush.h
+++ b/arch/arm64/include/asm/tlbflush.h
@@ -218,10 +218,11 @@ static inline void flush_tlb_page_nosync(struct vm_area_struct *vma,
unsigned long uaddr)
{
unsigned long addr = __TLBI_VADDR(uaddr, ASID(vma->vm_mm));
+ unsigned int level = get_vma_level(vma);
dsb(ishst);
- __tlbi_level(vale1is, addr, 0);
- __tlbi_user_level(vale1is, addr, 0);
+ __tlbi_level(vale1is, addr, level);
+ __tlbi_user_level(vale1is, addr, level);
}
static inline void flush_tlb_page(struct vm_area_struct *vma,
@@ -242,6 +243,7 @@ static inline void __flush_tlb_range(struct vm_area_struct *vma,
unsigned long stride, bool last_level)
{
unsigned long asid = ASID(vma->vm_mm);
+ unsigned int level = get_vma_level(vma);
unsigned long addr;
start = round_down(start, stride);
@@ -261,11 +263,11 @@ static inline void __flush_tlb_range(struct vm_area_struct *vma,
dsb(ishst);
for (addr = start; addr < end; addr += stride) {
if (last_level) {
- __tlbi_level(vale1is, addr, 0);
- __tlbi_user_level(vale1is, addr, 0);
+ __tlbi_level(vale1is, addr, level);
+ __tlbi_user_level(vale1is, addr, level);
} else {
- __tlbi_level(vae1is, addr, 0);
- __tlbi_user_level(vae1is, addr, 0);
+ __tlbi_level(vae1is, addr, level);
+ __tlbi_user_level(vae1is, addr, level);
}
}
dsb(ish);
diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
index 128f70852bf3..e6a1221cd86b 100644
--- a/arch/arm64/mm/mmu.c
+++ b/arch/arm64/mm/mmu.c
@@ -60,6 +60,20 @@ static pud_t bm_pud[PTRS_PER_PUD] __page_aligned_bss __maybe_unused;
static DEFINE_SPINLOCK(swapper_pgdir_lock);
+inline unsigned int get_vma_level(struct vm_area_struct *vma)
+{
+ unsigned int level = 0;
+ if (vma->vm_flags & VM_LEVEL_PUD)
+ level = 1;
+ else if (vma->vm_flags & VM_LEVEL_PMD)
+ level = 2;
+ else if (vma->vm_flags & VM_LEVEL_PTE)
+ level = 3;
+
+ vma->vm_flags &= ~(VM_LEVEL_PUD | VM_LEVEL_PMD | VM_LEVEL_PTE);
+ return level;
+}
+
void set_swapper_pgd(pgd_t *pgdp, pgd_t pgd)
{
pgd_t *fixmap_pgdp;
--
2.19.1
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