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Message-ID: <158475317083.125146.1467485980949213245@swboyd.mtv.corp.google.com>
Date: Fri, 20 Mar 2020 18:12:50 -0700
From: Stephen Boyd <sboyd@...nel.org>
To: Chunyan Zhang <zhang.lyra@...il.com>,
Mark Rutland <mark.rutland@....com>,
Michael Turquette <mturquette@...libre.com>,
Rob Herring <robh+dt@...nel.org>
Cc: linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, Orson Zhai <orsonzhai@...il.com>,
Baolin Wang <baolin.wang7@...il.com>,
Chunyan Zhang <zhang.lyra@...il.com>,
Chunyan Zhang <chunyan.zhang@...soc.com>
Subject: Re: [PATCH v6 3/7] dt-bindings: clk: sprd: add bindings for sc9863a clock controller
Quoting Chunyan Zhang (2020-03-03 23:27:26)
> From: Chunyan Zhang <chunyan.zhang@...soc.com>
>
> add a new bindings to describe sc9863a clock compatible string.
>
> Signed-off-by: Chunyan Zhang <chunyan.zhang@...soc.com>
[...]
> +examples:
> + - |
> + ap_clk: clock-controller@...00000 {
> + compatible = "sprd,sc9863a-ap-clk";
> + reg = <0 0x21500000 0 0x1000>;
> + clocks = <&ext_26m>, <&ext_32k>;
> + clock-names = "ext-26m", "ext-32k";
> + #clock-cells = <1>;
> + };
> +
> + - |
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + ap_ahb_regs: syscon@...00000 {
> + compatible = "sprd,sc9863a-glbregs", "syscon", "simple-mfd";
> + reg = <0 0x20e00000 0 0x4000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0 0x20e00000 0x4000>;
> +
> + apahb_gate: apahb-gate@0 {
Why do we need a node per "clk type" in the simple-mfd syscon? Can't we
register clks from the driver that matches the parent node and have that
driver know what sorts of clks are where? Sorry I haven't read the rest
of the patch series and I'm not aware if this came up before. If so,
please put details about this in the commit text.
> + compatible = "sprd,sc9863a-apahb-gate";
> + reg = <0x0 0x1020>;
> + #clock-cells = <1>;
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