linux-kernel - Re: [PATCH v2 04/17] clk: mmp2: Add support for PLL clock sources

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Message-ID: <158475388263.125146.11372517982520346232@swboyd.mtv.corp.google.com>
Date:   Fri, 20 Mar 2020 18:24:42 -0700
From:   Stephen Boyd <sboyd@...nel.org>
To:     Lubomir Rintel <lkundrak@...sk>
Cc:     Michael Turquette <mturquette@...libre.com>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>, linux-clk@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        Lubomir Rintel <lkundrak@...sk>
Subject: Re: [PATCH v2 04/17] clk: mmp2: Add support for PLL clock sources

Quoting Lubomir Rintel (2020-03-09 12:42:41)
> The clk-of-mmp2 driver pretends that the clock outputs from the PLLs are
> constant, but in fact they are configurable.
> 
> Add logic for obtaining the actual clock rates on MMP2 as well as MMP3.
> There is no documentation for either SoC, but the "systemsetting" drivers
> from Marvell GPL code dump provide some clue as far as MPMU registers on
> MMP2 [1] and MMP3 [2] go.
> 
> [1] https://git.kernel.org/pub/scm/linux/kernel/git/lkundrak/linux-mmp3-dell-ariel.git/tree/drivers/char/mmp2_systemsetting.c
> [2] https://git.kernel.org/pub/scm/linux/kernel/git/lkundrak/linux-mmp3-dell-ariel.git/tree/drivers/char/mmp3_systemsetting.c
> 
> A separate commit will adjust the clk-of-mmp2 driver.
> 
> Tested on a MMP3-based Dell Wyse 3020 as well as MMP2-based OLPC
> XO-1.75 laptop.
> 
> Signed-off-by: Lubomir Rintel <lkundrak@...sk>
> ---

Applied to clk-next