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Message-Id: <1584880394-11184-1-git-send-email-yi.l.liu@intel.com>
Date: Sun, 22 Mar 2020 05:33:12 -0700
From: "Liu, Yi L" <yi.l.liu@...el.com>
To: alex.williamson@...hat.com, eric.auger@...hat.com
Cc: kevin.tian@...el.com, jacob.jun.pan@...ux.intel.com,
joro@...tes.org, ashok.raj@...el.com, yi.l.liu@...el.com,
jun.j.tian@...el.com, yi.y.sun@...el.com, jean-philippe@...aro.org,
peterx@...hat.com, iommu@...ts.linux-foundation.org,
kvm@...r.kernel.org, linux-kernel@...r.kernel.org, hao.wu@...el.com
Subject: [PATCH v1 0/2] vfio/pci: expose device's PASID capability to VMs
From: Liu Yi L <yi.l.liu@...el.com>
Shared Virtual Addressing (SVA), a.k.a, Shared Virtual Memory (SVM) on
Intel platforms allows address space sharing between device DMA and
applications. SVA can reduce programming complexity and enhance security.
To enable SVA, device needs to have PASID capability, which is a key
capability for SVA. This patchset exposes the device's PASID capability
to guest instead of hiding it from guest.
The second patch emulates PASID capability for VFs (Virtual Function) since
VFs don't implement such capability per PCIe spec. This patch emulates such
capability and expose to VM if the capability is enabled in PF (Physical
Function).
However, there is an open for PASID emulation. If PF driver disables PASID
capability at runtime, then it may be an issue. e.g. PF should not disable
PASID capability if there is guest using this capability on any VF related
to this PF. To solve it, may need to introduce a generic communication
framework between vfio-pci driver and PF drivers. Please feel free to give
your suggestions on it.
Regards,
Yi Liu
Changelog:
- RFC v1 -> Patch v1:
Add CONFIG_PCI_ATS #ifdef control to avoid compiling error.
Liu Yi L (2):
vfio/pci: Expose PCIe PASID capability to guest
vfio/pci: Emulate PASID/PRI capability for VFs
drivers/vfio/pci/vfio_pci_config.c | 327 ++++++++++++++++++++++++++++++++++++-
1 file changed, 324 insertions(+), 3 deletions(-)
--
2.7.4
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