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Message-Id: <1584994632-31193-5-git-send-email-wcheng@codeaurora.org>
Date: Mon, 23 Mar 2020 13:17:12 -0700
From: Wesley Cheng <wcheng@...eaurora.org>
To: agross@...nel.org, bjorn.andersson@...aro.org, kishon@...com,
robh+dt@...nel.org, mark.rutland@....com, p.zabel@...gutronix.de
Cc: linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, Wesley Cheng <wcheng@...eaurora.org>
Subject: [PATCH v2 4/4] phy: qcom-qmp: Use proper PWRDOWN offset for sm8150 USB
The register map for SM8150 QMP USB SSPHY has moved
QPHY_POWER_DOWN_CONTROL to a different offset. Allow for
an offset in the register table to override default value
if it is a DP capable PHY.
Signed-off-by: Wesley Cheng <wcheng@...eaurora.org>
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c
index cc04471..71a230a 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
@@ -164,6 +164,7 @@ enum qphy_reg_layout {
[QPHY_SW_RESET] = 0x00,
[QPHY_START_CTRL] = 0x44,
[QPHY_PCS_STATUS] = 0x14,
+ [QPHY_COM_POWER_DOWN_CONTROL] = 0x40,
};
static const unsigned int sdm845_ufsphy_regs_layout[] = {
@@ -1627,6 +1628,9 @@ static int qcom_qmp_phy_com_init(struct qmp_phy *qphy)
if (cfg->has_phy_com_ctrl)
qphy_setbits(serdes, cfg->regs[QPHY_COM_POWER_DOWN_CONTROL],
SW_PWRDN);
+ else if (!cfg->has_phy_com_ctrl && cfg->regs[QPHY_COM_POWER_DOWN_CONTROL])
+ qphy_setbits(pcs, cfg->regs[QPHY_COM_POWER_DOWN_CONTROL],
+ cfg->pwrdn_ctrl);
else
qphy_setbits(pcs, QPHY_POWER_DOWN_CONTROL, cfg->pwrdn_ctrl);
--
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a Linux Foundation Collaborative Project
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