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Message-Id: <20200324161525.754181-2-hch@lst.de>
Date: Tue, 24 Mar 2020 17:15:20 +0100
From: Christoph Hellwig <hch@....de>
To: Thomas Bogendoerfer <tsbogend@...ha.franken.de>
Cc: linux-mips@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: [PATCH 1/6] MIPS: remove cpu_has_64bit_gp_regs and cpu_has_64bit_addresses
Both macros are always identical to CONFIG_64BIT.
Signed-off-by: Christoph Hellwig <hch@....de>
---
arch/mips/include/asm/cpu-features.h | 12 ------------
arch/mips/include/asm/io.h | 4 ++--
.../include/asm/mach-ath25/cpu-feature-overrides.h | 2 --
.../include/asm/mach-ath79/cpu-feature-overrides.h | 2 --
.../asm/mach-lantiq/falcon/cpu-feature-overrides.h | 2 --
.../asm/mach-ralink/mt7620/cpu-feature-overrides.h | 2 --
.../asm/mach-ralink/mt7621/cpu-feature-overrides.h | 2 --
.../asm/mach-ralink/rt288x/cpu-feature-overrides.h | 2 --
.../asm/mach-ralink/rt305x/cpu-feature-overrides.h | 2 --
.../asm/mach-ralink/rt3883/cpu-feature-overrides.h | 2 --
.../include/asm/mach-rc32434/cpu-feature-overrides.h | 2 --
arch/mips/mm/page.c | 12 ++++++------
12 files changed, 8 insertions(+), 38 deletions(-)
diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
index de44c92b1c1f..2798ea0d5fff 100644
--- a/arch/mips/include/asm/cpu-features.h
+++ b/arch/mips/include/asm/cpu-features.h
@@ -432,12 +432,6 @@
# ifndef cpu_has_64bit_zero_reg
# define cpu_has_64bit_zero_reg (cpu_data[0].isa_level & MIPS_CPU_ISA_64BIT)
# endif
-# ifndef cpu_has_64bit_gp_regs
-# define cpu_has_64bit_gp_regs 0
-# endif
-# ifndef cpu_has_64bit_addresses
-# define cpu_has_64bit_addresses 0
-# endif
# ifndef cpu_vmbits
# define cpu_vmbits 31
# endif
@@ -453,12 +447,6 @@
# ifndef cpu_has_64bit_zero_reg
# define cpu_has_64bit_zero_reg 1
# endif
-# ifndef cpu_has_64bit_gp_regs
-# define cpu_has_64bit_gp_regs 1
-# endif
-# ifndef cpu_has_64bit_addresses
-# define cpu_has_64bit_addresses 1
-# endif
# ifndef cpu_vmbits
# define cpu_vmbits cpu_data[0].vmbits
# define __NEED_VMBITS_PROBE
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index cf1f2a4a2418..7be323ed2bfd 100644
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -166,7 +166,7 @@ static inline void __iomem * __ioremap_mode(phys_addr_t offset, unsigned long si
#define __IS_LOW512(addr) (!((phys_addr_t)(addr) & (phys_addr_t) ~0x1fffffffULL))
- if (cpu_has_64bit_addresses) {
+ if (IS_ENABLED(CONFIG_64BIT)) {
u64 base = UNCAC_BASE;
/*
@@ -275,7 +275,7 @@ static inline void iounmap(const volatile void __iomem *addr)
#define __IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == CKSEG1)
- if (cpu_has_64bit_addresses ||
+ if (IS_ENABLED(CONFIG_64BIT) ||
(__builtin_constant_p(addr) && __IS_KSEG1(addr)))
return;
diff --git a/arch/mips/include/asm/mach-ath25/cpu-feature-overrides.h b/arch/mips/include/asm/mach-ath25/cpu-feature-overrides.h
index 95a0b580909d..91f638ee68e0 100644
--- a/arch/mips/include/asm/mach-ath25/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-ath25/cpu-feature-overrides.h
@@ -55,7 +55,5 @@
#define cpu_has_64bits 0
#define cpu_has_64bit_zero_reg 0
-#define cpu_has_64bit_gp_regs 0
-#define cpu_has_64bit_addresses 0
#endif /* __ASM_MACH_ATH25_CPU_FEATURE_OVERRIDES_H */
diff --git a/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h b/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h
index e7c972fccd9f..bc52a75d77a8 100644
--- a/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h
@@ -44,8 +44,6 @@
#define cpu_has_64bits 0
#define cpu_has_64bit_zero_reg 0
-#define cpu_has_64bit_gp_regs 0
-#define cpu_has_64bit_addresses 0
#define cpu_dcache_line_size() 32
#define cpu_icache_line_size() 32
diff --git a/arch/mips/include/asm/mach-lantiq/falcon/cpu-feature-overrides.h b/arch/mips/include/asm/mach-lantiq/falcon/cpu-feature-overrides.h
index f03c1c42dd90..0fdec83af64b 100644
--- a/arch/mips/include/asm/mach-lantiq/falcon/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-lantiq/falcon/cpu-feature-overrides.h
@@ -45,8 +45,6 @@
#define cpu_has_64bits 0
#define cpu_has_64bit_zero_reg 0
-#define cpu_has_64bit_gp_regs 0
-#define cpu_has_64bit_addresses 0
#define cpu_dcache_line_size() 32
#define cpu_icache_line_size() 32
diff --git a/arch/mips/include/asm/mach-ralink/mt7620/cpu-feature-overrides.h b/arch/mips/include/asm/mach-ralink/mt7620/cpu-feature-overrides.h
index 6ea5908f0c11..945e0fd4a884 100644
--- a/arch/mips/include/asm/mach-ralink/mt7620/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-ralink/mt7620/cpu-feature-overrides.h
@@ -44,8 +44,6 @@
#define cpu_has_64bits 0
#define cpu_has_64bit_zero_reg 0
-#define cpu_has_64bit_gp_regs 0
-#define cpu_has_64bit_addresses 0
#define cpu_dcache_line_size() 32
#define cpu_icache_line_size() 32
diff --git a/arch/mips/include/asm/mach-ralink/mt7621/cpu-feature-overrides.h b/arch/mips/include/asm/mach-ralink/mt7621/cpu-feature-overrides.h
index e06f517b2588..21f73ef8f695 100644
--- a/arch/mips/include/asm/mach-ralink/mt7621/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-ralink/mt7621/cpu-feature-overrides.h
@@ -45,8 +45,6 @@
#define cpu_has_64bits 0
#define cpu_has_64bit_zero_reg 0
-#define cpu_has_64bit_gp_regs 0
-#define cpu_has_64bit_addresses 0
#define cpu_dcache_line_size() 32
#define cpu_icache_line_size() 32
diff --git a/arch/mips/include/asm/mach-ralink/rt288x/cpu-feature-overrides.h b/arch/mips/include/asm/mach-ralink/rt288x/cpu-feature-overrides.h
index 9c069646d0bd..c314c3cec130 100644
--- a/arch/mips/include/asm/mach-ralink/rt288x/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-ralink/rt288x/cpu-feature-overrides.h
@@ -43,8 +43,6 @@
#define cpu_has_64bits 0
#define cpu_has_64bit_zero_reg 0
-#define cpu_has_64bit_gp_regs 0
-#define cpu_has_64bit_addresses 0
#define cpu_dcache_line_size() 16
#define cpu_icache_line_size() 16
diff --git a/arch/mips/include/asm/mach-ralink/rt305x/cpu-feature-overrides.h b/arch/mips/include/asm/mach-ralink/rt305x/cpu-feature-overrides.h
index 2e423fd15384..9fb175dc9b78 100644
--- a/arch/mips/include/asm/mach-ralink/rt305x/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-ralink/rt305x/cpu-feature-overrides.h
@@ -43,8 +43,6 @@
#define cpu_has_64bits 0
#define cpu_has_64bit_zero_reg 0
-#define cpu_has_64bit_gp_regs 0
-#define cpu_has_64bit_addresses 0
#define cpu_dcache_line_size() 32
#define cpu_icache_line_size() 32
diff --git a/arch/mips/include/asm/mach-ralink/rt3883/cpu-feature-overrides.h b/arch/mips/include/asm/mach-ralink/rt3883/cpu-feature-overrides.h
index 7cee0e232580..57857566e5df 100644
--- a/arch/mips/include/asm/mach-ralink/rt3883/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-ralink/rt3883/cpu-feature-overrides.h
@@ -42,8 +42,6 @@
#define cpu_has_64bits 0
#define cpu_has_64bit_zero_reg 0
-#define cpu_has_64bit_gp_regs 0
-#define cpu_has_64bit_addresses 0
#define cpu_dcache_line_size() 32
#define cpu_icache_line_size() 32
diff --git a/arch/mips/include/asm/mach-rc32434/cpu-feature-overrides.h b/arch/mips/include/asm/mach-rc32434/cpu-feature-overrides.h
index bc46179fdf40..852f15c8853b 100644
--- a/arch/mips/include/asm/mach-rc32434/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-rc32434/cpu-feature-overrides.h
@@ -53,8 +53,6 @@
/* #define cpu_has_nofpuex ? */
#define cpu_has_64bits 0
#define cpu_has_64bit_zero_reg 0
-#define cpu_has_64bit_gp_regs 0
-#define cpu_has_64bit_addresses 0
#define cpu_has_inclusive_pcaches 0
diff --git a/arch/mips/mm/page.c b/arch/mips/mm/page.c
index c5578897a4fa..6bc6540dc9de 100644
--- a/arch/mips/mm/page.c
+++ b/arch/mips/mm/page.c
@@ -104,7 +104,7 @@ static int cache_line_size;
static inline void
pg_addiu(u32 **buf, unsigned int reg1, unsigned int reg2, unsigned int off)
{
- if (cpu_has_64bit_gp_regs && DADDI_WAR && r4k_daddiu_bug()) {
+ if (IS_ENABLED(CONFIG_64BIT) && DADDI_WAR && r4k_daddiu_bug()) {
if (off > 0x7fff) {
uasm_i_lui(buf, T9, uasm_rel_hi(off));
uasm_i_addiu(buf, T9, T9, uasm_rel_lo(off));
@@ -123,12 +123,12 @@ pg_addiu(u32 **buf, unsigned int reg1, unsigned int reg2, unsigned int off)
static void set_prefetch_parameters(void)
{
- if (cpu_has_64bit_gp_regs || cpu_has_64bit_zero_reg)
+ if (IS_ENABLED(CONFIG_64BIT) || cpu_has_64bit_zero_reg)
clear_word_size = 8;
else
clear_word_size = 4;
- if (cpu_has_64bit_gp_regs)
+ if (IS_ENABLED(CONFIG_64BIT))
copy_word_size = 8;
else
copy_word_size = 4;
@@ -232,7 +232,7 @@ static void set_prefetch_parameters(void)
static void build_clear_store(u32 **buf, int off)
{
- if (cpu_has_64bit_gp_regs || cpu_has_64bit_zero_reg) {
+ if (IS_ENABLED(CONFIG_64BIT) || cpu_has_64bit_zero_reg) {
uasm_i_sd(buf, ZERO, off, A0);
} else {
uasm_i_sw(buf, ZERO, off, A0);
@@ -366,7 +366,7 @@ void build_clear_page(void)
static void build_copy_load(u32 **buf, int reg, int off)
{
- if (cpu_has_64bit_gp_regs) {
+ if (IS_ENABLED(CONFIG_64BIT)) {
uasm_i_ld(buf, reg, off, A1);
} else {
uasm_i_lw(buf, reg, off, A1);
@@ -375,7 +375,7 @@ static void build_copy_load(u32 **buf, int reg, int off)
static void build_copy_store(u32 **buf, int reg, int off)
{
- if (cpu_has_64bit_gp_regs) {
+ if (IS_ENABLED(CONFIG_64BIT)) {
uasm_i_sd(buf, reg, off, A0);
} else {
uasm_i_sw(buf, reg, off, A0);
--
2.25.1
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