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Message-ID: <f59eb7fa-5b26-60e4-771f-f6f9ecfa0b5f@nvidia.com>
Date: Tue, 24 Mar 2020 18:15:02 -0700
From: Sowjanya Komatineni <skomatineni@...dia.com>
To: Dmitry Osipenko <digetx@...il.com>, <thierry.reding@...il.com>,
<jonathanh@...dia.com>, <frankc@...dia.com>, <hverkuil@...all.nl>,
<helen.koike@...labora.com>
CC: <sboyd@...nel.org>, <linux-media@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-clk@...r.kernel.org>,
<linux-tegra@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [RFC PATCH v5 6/9] media: tegra: Add Tegra210 Video input driver
On 3/24/20 6:08 PM, Sowjanya Komatineni wrote:
>
> On 3/24/20 5:34 PM, Dmitry Osipenko wrote:
>> External email: Use caution opening links or attachments
>>
>>
>> 23.03.2020 20:52, Sowjanya Komatineni пишет:
>>> +static void tegra_channel_vi_soft_reset(struct tegra_vi_channel *chan)
>>> +{
>>> + /* disable clock gating to enable continuous clock */
>>> + tegra_vi_write(chan, TEGRA_VI_CFG_CG_CTRL, 0);
>>> + /*
>>> + * Soft reset memory client interface, pixel format logic, sensor
>>> + * control logic, and a shadow copy logic to bring VI to clean
>>> state.
>>> + */
>>> + vi_csi_write(chan, TEGRA_VI_CSI_SW_RESET, 0xf);
>>> + usleep_range(100, 200);
>>> + vi_csi_write(chan, TEGRA_VI_CSI_SW_RESET, 0x0);
>> Is it safe to reset MCCIF without blocking and flushing memory requests
>> at first?
> Yes to bring VI to clean state on errors its recommended by HW design
> team.
BTW, just to be clear this is Software reset.
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