linux-kernel - Re: [PATCH v8 06/11] irqchip: mips-cpu: Convert to simple domain

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Message-ID: <8F2B64C3-A887-4D4B-ABEA-4BE3D30F4632@flygoat.com>
Date:   Thu, 26 Mar 2020 00:02:28 +0800
From:   Jiaxun Yang <jiaxun.yang@...goat.com>
To:     Thomas Bogendoerfer <tsbogend@...ha.franken.de>
CC:     Marc Zyngier <maz@...nel.org>, linux-mips@...r.kernel.org,
        Huacai Chen <chenhc@...ote.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Jason Cooper <jason@...edaemon.net>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Mauro Carvalho Chehab <mchehab+samsung@...nel.org>,
        "David S. Miller" <davem@...emloft.net>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Jonathan Cameron <Jonathan.Cameron@...wei.com>,
        Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
        Allison Randal <allison@...utok.net>,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH v8 06/11] irqchip: mips-cpu: Convert to simple domain



于 2020年3月25日 GMT+08:00 下午11:46:00, Thomas Bogendoerfer <tsbogend@...ha.franken.de> 写到:
>On Wed, Mar 25, 2020 at 11:09:10PM +0800, Jiaxun Yang wrote:
>> 
>> 
>> 于 2020年3月25日 GMT+08:00 下午11:04:37, Thomas Bogendoerfer
><tsbogend@...ha.franken.de> 写到:
>> >On Wed, Mar 25, 2020 at 10:31:21PM +0800, Jiaxun Yang wrote:
>> >> 
>> >> 
>> >> 于 2020年3月25日 GMT+08:00 下午10:15:16, Marc Zyngier <maz@...nel.org>
>写到:
>> >> >On 2020-03-25 13:59, Jiaxun Yang wrote:
>> >> >
>> >> >[...]
>> >> >
>> >> >>>> So probably we can use legacy domain when  MIPS IRQ BASE is
>in
>> >the
>> >> >>>> range of legacy IRQ
>> >> >>>> and switch to simple domain when it's not in that range?
>> >> >>> 
>> >> >>> No, see below.
>> >> >>> 
>> >> >>>> Here in Loongson systems IRQ 0-15 is occupied by I8259 so I
>did
>> >> >this
>> >> >>>> hack.
>> >> >>> 
>> >> >>> Well, if you have to consider which Linux IRQ gets assigned,
>> >> >>> then your platform is definitely not ready for non-legacy
>> >> >>> irqdomains. Just stick to legacy for now until you have
>removed
>> >> >>> all the code that knows the hwirq mapping.
>> >> >> 
>> >> >> Thanks.
>> >> >> 
>> >> >> So I have to allocate irq_desc here in driver manually?
>> >> >
>> >> >No, you are probably better off just dropping this patch, as MIPS
>> >> >doesn't seem to be ready for a wholesale switch to virtual
>> >interrupts.
>> >> 
>> >> It can't work without this patch.
>> >> 
>> >> Legacy domain require IRQ number within 0-15 
>> >> however it's already occupied by i8259 or "HTPIC" driver.
>> >
>> >what's the problem here ? AFAIK there could be more than one
>> >legacy domain, at least that's what at least IP22/SNI in MIPS world 
>> >are doing.
>> 
>> MIPS_IRQ_BASE must be higher than 15, otherwise it will conflict with
>i8259.
>
>I still don't get it.
>
>We have following in arch/mips/include/asm/mach-generic/irq.h:
>
>#ifndef MIPS_CPU_IRQ_BASE
>#ifdef CONFIG_I8259
>#define MIPS_CPU_IRQ_BASE 16
>#else
>#define MIPS_CPU_IRQ_BASE 0
>#endif /* CONFIG_I8259 */
>#endif
>
>So every legacy platform with i8259 has MIPS_CPU_IRQ_BASE = 16.
>
>> However we have only preallocated irq_desc for 0-15.
>> And legacy domain require irq_desc being preallocated.
>
>maybe I'm too fast by judging the irq code, but without
>CONFIG_SPARSE_IRQ
>the whole irq_desc is pre-allocated.

Sorry. You're right.
I found the problem is CONFIG_SPARSE_IRQ is accidentally enabled in my config due to another out-of-tree patch
during my initial test and I always consider it as a problem.

So we can drop this patch safely for now.
But just need to consider how to deal with it when we want to enable SPARSE_IRQ.

Thanks.

>
>Thomas.

-- 
Jiaxun Yang