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Message-Id: <20200326220213.28632-2-a.fatoum@pengutronix.de>
Date:   Thu, 26 Mar 2020 23:02:06 +0100
From:   Ahmad Fatoum <a.fatoum@...gutronix.de>
To:     Maxime Coquelin <mcoquelin.stm32@...il.com>,
        Alexandre Torgue <alexandre.torgue@...com>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>
Cc:     kernel@...gutronix.de, Ahmad Fatoum <a.fatoum@...gutronix.de>,
        linux-stm32@...md-mailman.stormreply.com,
        linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: [PATCH v2 2/8] ARM: dts: stm32: preset stm32mp15x video #address- and #size-cells

The cell count for address and size is defined by the binding and not
something a board would change. Avoid each board adding this
boilerplate by having the cell size specification in the SoC DTSI.

Signed-off-by: Ahmad Fatoum <a.fatoum@...gutronix.de>
---
v1 -> v2:
  - New Patch
---
 arch/arm/boot/dts/stm32mp151.dtsi | 5 +++++
 arch/arm/boot/dts/stm32mp157.dtsi | 7 +++++++
 2 files changed, 12 insertions(+)

diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi
index 3ea05ba48215..e5709136a4ca 100644
--- a/arch/arm/boot/dts/stm32mp151.dtsi
+++ b/arch/arm/boot/dts/stm32mp151.dtsi
@@ -1423,6 +1423,11 @@ ltdc: display-controller@...01000 {
 			clock-names = "lcd";
 			resets = <&rcc LTDC_R>;
 			status = "disabled";
+
+			port {
+				#address-cells = <1>;
+				#size-cells = <0>;
+			};
 		};
 
 		iwdg2: watchdog@...02000 {
diff --git a/arch/arm/boot/dts/stm32mp157.dtsi b/arch/arm/boot/dts/stm32mp157.dtsi
index 5e733cd16ff9..54e73ccea446 100644
--- a/arch/arm/boot/dts/stm32mp157.dtsi
+++ b/arch/arm/boot/dts/stm32mp157.dtsi
@@ -24,7 +24,14 @@ dsi: dsi@...00000 {
 			clock-names = "pclk", "ref", "px_clk";
 			resets = <&rcc DSI_R>;
 			reset-names = "apb";
+			#address-cells = <1>;
+			#size-cells = <0>;
 			status = "disabled";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+			};
 		};
 	};
 };
-- 
2.26.0.rc2

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