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Message-ID: <CAK8P3a0MP9xhmDgyN4TJ5_jzagVTO1hKVgNFs6R4NA6WoKBFJA@mail.gmail.com>
Date:   Thu, 26 Mar 2020 13:34:38 +0100
From:   Arnd Bergmann <arnd@...db.de>
To:     Srinath Mannam <srinath.mannam@...adcom.com>
Cc:     Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Florian Fainelli <f.fainelli@...il.com>,
        Ray Jui <rjui@...adcom.com>, Rob Herring <robh+dt@...nel.org>,
        Andrew Murray <andrew.murray@....com>,
        Mark Rutland <mark.rutland@....com>,
        Andy Shevchenko <andy.shevchenko@...il.com>,
        bcm-kernel-feedback-list <bcm-kernel-feedback-list@...adcom.com>,
        linux-pci <linux-pci@...r.kernel.org>,
        DTML <devicetree@...r.kernel.org>,
        Linux ARM <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Ray Jui <ray.jui@...adcom.com>
Subject: Re: [PATCH v5 2/6] PCI: iproc: Add INTx support with better modeling

On Thu, Mar 26, 2020 at 7:49 AM Srinath Mannam
<srinath.mannam@...adcom.com> wrote:
> -static void iproc_pcie_enable(struct iproc_pcie *pcie)
> +static void iproc_pcie_mask_irq(struct irq_data *d)
>  {
> +       struct iproc_pcie *pcie = irq_data_get_irq_chip_data(d);
> +       u32 val;
> +       unsigned long flags;
> +
> +       spin_lock_irqsave(&pcie->intx_lock, flags);
> +       val =  iproc_pcie_read_reg(pcie, IPROC_PCIE_INTX_EN);
> +       val &= ~(BIT(irqd_to_hwirq(d)));
> +       iproc_pcie_write_reg(pcie, IPROC_PCIE_INTX_EN, val);
> +       spin_unlock_irqrestore(&pcie->intx_lock, flags);
> +}

I think these need to use a raw spinlock, or you get problems with
PREEMPT_RT

     Arnd

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