linux-kernel - Re: [RFC] clk: vc5: Add bindings for output configurations

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Message-ID: <CAMuHMdU9tQwQHkX0MdQLkMfz-2ymDzfNTFGnzPoq=JQF+28HOg@mail.gmail.com>
Date:   Fri, 27 Mar 2020 10:41:24 +0100
From:   Geert Uytterhoeven <geert@...ux-m68k.org>
To:     Adam Ford <aford173@...il.com>
Cc:     "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>, aford@...conembedded.com,
        charles.stevens@...icpd.com,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        linux-clk <linux-clk@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Marek Vasut <marek.vasut+renesas@...il.com>
Subject: Re: [RFC] clk: vc5: Add bindings for output configurations

Hi Adam,

CC Marek

On Thu, Mar 26, 2020 at 10:33 PM Adam Ford <aford173@...il.com> wrote:
> The Versaclock can be purchased in a non-programmed configuration.
> If that is the case, the driver needs to configure the chip to
> output the correct signal type, voltage and slew.
>
> This RFC is proposing an additional binding to allow non-programmed
> chips to be configured beyond their default configuration.
>
> Signed-off-by: Adam Ford <aford173@...il.com>
>
> diff --git a/Documentation/devicetree/bindings/clock/idt,versaclock5.txt b/Documentation/devicetree/bindings/clock/idt,versaclock5.txt
> index 05a245c9df08..4bc46ed9ba4a 100644
> --- a/Documentation/devicetree/bindings/clock/idt,versaclock5.txt
> +++ b/Documentation/devicetree/bindings/clock/idt,versaclock5.txt
> @@ -30,6 +30,25 @@ Required properties:
>                 - 5p49v5933 and
>                 - 5p49v5935: (optional) property not present or "clkin".
>
> +For all output ports, an option child node can be used to specify:
> +
> +- mode: can be one of
> +                 - LVPECL: Low-voltage positive/psuedo emitter-coupled logic
> +                 - CMOS
> +                 - HCSL
> +                 - LVDS: Low voltage differential signal
> +
> +- voltage-level:  can be one of the following microvolts
> +                 - 1800000
> +                 - 2500000
> +                 - 3300000
> +-  slew: Percent of normal, can be one of
> +                 - P80
> +                 - P85
> +                 - P90
> +                 - P100

Why the P prefixes? Can't you just use integer values?
After the conversion to json-schema, these values can be validated, too.

> +
> +
>  ==Mapping between clock specifier and physical pins==
>
>  When referencing the provided clock in the DT using phandle and
> @@ -62,6 +81,8 @@ clock specifier, the following mapping applies:
>
>  ==Example==
>
> +#include <dt-bindings/versaclock.h>

Does not exist?

> +
>  /* 25MHz reference crystal */
>  ref25: ref25m {
>         compatible = "fixed-clock";
> @@ -80,6 +101,13 @@ i2c-master-node {
>                 /* Connect XIN input to 25MHz reference */
>                 clocks = <&ref25m>;
>                 clock-names = "xin";
> +
> +               ports@1 {
> +                       reg = <1>;
> +                       mode = <CMOS>;
> +                       pwr_sel = <1800000>;
> +                       slew = <P80>;
> +               };
>         };
>  };

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds