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Message-Id: <20200329112659.327916-1-maz@kernel.org>
Date:   Sun, 29 Mar 2020 12:26:59 +0100
From:   Marc Zyngier <maz@...nel.org>
To:     Thomas Gleixner <tglx@...utronix.de>
Cc:     afzal mohammed <afzal.mohd.ma@...il.com>,
        Alexandre Torgue <alexandre.torgue@...com>,
        Anirudha Sarangi <anirudha.sarangi@...inx.com>,
        Anson Huang <Anson.Huang@....com>,
        Anup Patel <anup@...infault.org>,
        Atish Patra <atish.patra@....com>,
        Eric Auger <eric.auger@...hat.com>,
        Florian Fainelli <f.fainelli@...il.com>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        "Gustavo A . R . Silva" <gustavo@...eddedor.com>,
        Heyi Guo <guoheyi@...wei.com>,
        Liguang Zhang <zhangliguang@...ux.alibaba.com>,
        Linus Walleij <linus.walleij@...aro.org>,
        Lukas Wunner <lukas@...ner.de>, Marek Vasut <marex@...x.de>,
        Michal Simek <michal.simek@...inx.com>,
        Mubin Sayyed <mubin.usman.sayyed@...inx.com>,
        Nianyao Tang <tangnianyao@...wei.com>,
        Nicolas Saenz Julienne <nsaenzjulienne@...e.de>,
        Stefan Asserhall <stefan.asserhall@...inx.com>,
        Sungbo Eo <mans0n@...ani.run>,
        Zenghui Yu <yuzenghui@...wei.com>,
        周琰杰 <zhouyanjie@...yeetech.com>,
        Jason Cooper <jason@...edaemon.net>,
        linux-kernel@...r.kernel.org
Subject: [GIT PULL] irqchip updates for Linux 5.7

Hi Thomas,

Here are the irqchip department updates for Linux 5.7.

The largest part is the second half of the GICv4.1 support code (the
*third* half will go via the KVM tree). The rest is a varied bunch of
feature improvement (level trigger support for STM32, multi-instance
support for Xilinx and PLIC, CPU hotplug support for PLIC, Ingenic
X100 support) as well as a selection of fixes (interrupt retriggering,
RPi initialization, a number of GIC blunders...) and cleanups
(farewell to setup_irq).

Stay safe, and please pull,

	M.

The following changes since commit 98d54f81e36ba3bf92172791eba5ca5bd813989b:

  Linux 5.6-rc4 (2020-03-01 16:38:46 -0600)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git tags/irqchip-5.7

for you to fetch changes up to 771df8cf0bc3a9a94bc16a58da136cad186cea27:

  Merge branch 'irq/gic-v4.1' into irq/irqchip-next (2020-03-24 12:43:47 +0000)

----------------------------------------------------------------
irqchip updates for Linux 5.7

- Second batch of the GICv4.1 support saga
- Level triggered interrupt support for the stm32 controller
- Versatile-fpga chained interrupt fixes
- DT support for cascaded VIC interrupt controller
- RPi irqchip initialization fixes
- Multi-instance support for the Xilinx interrupt controller
- Multi-instance support for the PLIC interrupt controller
- CPU hotplug support for the PLIC interrupt controller
- Ingenic X1000 TCU support
- Small fixes all over the shop (GICv3, GICv4, Xilinx, Atmel, sa1111)
- Cleanups (setup_irq removal, zero-length array removal)

----------------------------------------------------------------
Alexandre Torgue (2):
      irqchip/stm32: Add irq retrigger support
      pinctrl: stm32: Add level interrupt support to gpio irq chip

Anson Huang (1):
      irqchip: Add COMPILE_TEST support for IMX_INTMUX

Atish Patra (2):
      irqchip/sifive-plic: Enable/Disable external interrupts upon cpu online/offline
      irqchip/sifive-plic: Add support for multiple PLICs

Geert Uytterhoeven (1):
      irqchip/renesas-intc-irqpin: Restore devm_ioremap() alignment

Gustavo A. R. Silva (2):
      irqchip/irq-bcm7038-l1: Replace zero-length array with flexible-array member
      irqchip/qcom-irq-combiner: Replace zero-length array with flexible-array member

Heyi Guo (2):
      irqchip/gic-v3-its: Fix access width for gicr_syncr
      irqchip/gic-v4: Use Inner-Shareable attributes for virtual pending tables

Linus Walleij (1):
      irqchip: vic: Support cascaded VIC in device tree

Lukas Wunner (1):
      irqchip/bcm2835: Quiesce IRQs left enabled by bootloader

Marc Zyngier (21):
      irqchip/gic-v3-its: Probe ITS page size for all GITS_BASERn registers
      irqchip/atmel-aic: Fix irq_retrigger callback return value
      irqchip/atmel-aic5: Fix irq_retrigger callback return value
      ARM: sa1111: Fix irq_retrigger callback return value
      irqchip/gic-v4: Provide irq_retrigger to avoid circular locking dependency
      irqchip/gic-v3: Use SGIs without active state if offered
      irqchip/gic-v4.1: Skip absent CPUs while iterating over redistributors
      irqchip/gic-v4.1: Ensure mutual exclusion between vPE affinity change and RD access
      irqchip/gic-v4.1: Ensure mutual exclusion betwen invalidations on the same RD
      irqchip/gic-v4.1: Advertise support v4.1 to KVM
      irqchip/gic-v4.1: Map the ITS SGIR register page
      irqchip/gic-v4.1: Plumb skeletal VSGI irqchip
      irqchip/gic-v4.1: Add initial SGI configuration
      irqchip/gic-v4.1: Plumb mask/unmask SGI callbacks
      irqchip/gic-v4.1: Plumb get/set_irqchip_state SGI callbacks
      irqchip/gic-v4.1: Plumb set_vcpu_affinity SGI callbacks
      irqchip/gic-v4.1: Move doorbell management to the GICv4 abstraction layer
      irqchip/gic-v4.1: Add VSGI allocation/teardown
      irqchip/gic-v4.1: Add VSGI property setup
      irqchip/gic-v4.1: Eagerly vmap vPEs
      Merge branch 'irq/gic-v4.1' into irq/irqchip-next

Marek Vasut (1):
      irqchip/stm32: Retrigger both in eoi and unmask callbacks

Michal Simek (2):
      irqchip/xilinx: Fill error code when irq domain registration fails
      irqchip/xilinx: Enable generic irq multi handler

Mubin Sayyed (2):
      irqchip/xilinx: Add support for multiple instances
      irqchip/xilinx: Do not call irq_set_default_host()

Sungbo Eo (2):
      irqchip/versatile-fpga: Handle chained IRQs properly
      irqchip/versatile-fpga: Apply clear-mask earlier

Zenghui Yu (1):
      irqchip/gic-v4.1: Wait for completion of redistributor's INVALL operation

afzal mohammed (1):
      irqchip: Replace setup_irq() by request_irq()

luanshi (1):
      irqchip/gic-v3: Move irq_domain_update_bus_token to after checking for NULL domain

周琰杰 (Zhou Yanjie) (1):
      irqchip/ingenic: Add support for TCU of X1000.

 arch/arm/common/sa1111.c                  |   7 +-
 arch/microblaze/Kconfig                   |   2 +
 arch/microblaze/include/asm/irq.h         |   3 -
 arch/microblaze/kernel/irq.c              |  21 +-
 arch/riscv/kernel/traps.c                 |   2 +-
 drivers/irqchip/Kconfig                   |   2 +-
 drivers/irqchip/irq-atmel-aic.c           |   2 +-
 drivers/irqchip/irq-atmel-aic5.c          |   2 +-
 drivers/irqchip/irq-bcm2835.c             |  15 +
 drivers/irqchip/irq-bcm7038-l1.c          |   2 +-
 drivers/irqchip/irq-gic-v3-its.c          | 532 ++++++++++++++++++++++++++----
 drivers/irqchip/irq-gic-v3.c              |  16 +-
 drivers/irqchip/irq-gic-v4.c              | 134 +++++++-
 drivers/irqchip/irq-i8259.c               |  16 +-
 drivers/irqchip/irq-ingenic-tcu.c         |   1 +
 drivers/irqchip/irq-ingenic.c             |   9 +-
 drivers/irqchip/irq-renesas-intc-irqpin.c |   2 +-
 drivers/irqchip/irq-sifive-plic.c         | 119 +++++--
 drivers/irqchip/irq-stm32-exti.c          |  14 +-
 drivers/irqchip/irq-versatile-fpga.c      |  18 +-
 drivers/irqchip/irq-vic.c                 |   9 +-
 drivers/irqchip/irq-xilinx-intc.c         | 123 ++++---
 drivers/irqchip/qcom-irq-combiner.c       |   2 +-
 drivers/pinctrl/stm32/pinctrl-stm32.c     |  57 +++-
 include/kvm/arm_vgic.h                    |   1 +
 include/linux/cpuhotplug.h                |   1 +
 include/linux/irqchip/arm-gic-common.h    |   2 +
 include/linux/irqchip/arm-gic-v3.h        |  23 +-
 include/linux/irqchip/arm-gic-v4.h        |  25 +-
 virt/kvm/arm/vgic/vgic-v3.c               |   4 +-
 virt/kvm/arm/vgic/vgic-v4.c               |  34 +-
 31 files changed, 964 insertions(+), 236 deletions(-)

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