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Message-ID: <20200330070205.pi5oaju5kjzjms5s@pengutronix.de>
Date: Mon, 30 Mar 2020 09:02:05 +0200
From: Oleksij Rempel <o.rempel@...gutronix.de>
To: Andrew Lunn <andrew@...n.ch>
Cc: Christian Herber <christian.herber@....com>,
Rob Herring <robh@...nel.org>,
Florian Fainelli <f.fainelli@...il.com>,
Mark Rutland <mark.rutland@....com>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
Marek Vasut <marex@...x.de>, netdev <netdev@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
David Jander <david@...tonic.nl>,
"David S. Miller" <davem@...emloft.net>,
Heiner Kallweit <hkallweit1@...il.com>
Subject: Re: Re: [PATCH v4 1/4] dt-bindings: net: phy: Add support for NXP
TJA11xx
Hi,
On Mon, Mar 23, 2020 at 04:14:23PM +0100, Andrew Lunn wrote:
> > Yes, it is one device with two address. This is if you call the entire IC a device. If you look at it from a PHY perspective, it is two devices with 1 address.
> > If you just look at it as a single device, it gets difficult to add PHY specific properties in the future, e.g. master/slave selection.
>
> > In my opinion its important to have some kind of container for the
> > entire IC, but likewise for the individual PHYs.
>
> Yes, we need some sort of representation of two devices.
>
> Logically, the two PHYs are on the same MDIO bus, so you could have
> two nodes on the main bus.
>
> Or you consider the secondary PHY as being on an internal MDIO bus
> which is transparently bridged to the main bus. This is what was
> proposed in the last patchset.
>
> Because this bridge is transparent, the rest of the PHY/MDIO framework
> has no idea about it. So i prefer that we keep with two PHY nodes on
> the main bus. But i still think we need the master PHY to register the
> secondary PHY, due to the missing PHY ID, and the other constrains
> like resets which the master PHY has to handle.
this discussion is stalled.
What is the final decision? What is the proper and mainlinable way?
Regards,
Oleksij
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