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Message-ID: <20200331212417.GA20941@bogus>
Date: Tue, 31 Mar 2020 15:24:17 -0600
From: Rob Herring <robh@...nel.org>
To: Dilip Kota <eswara.kota@...ux.intel.com>
Cc: linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
kishon@...com, robh@...nel.org, andriy.shevchenko@...el.com,
cheol.yong.kim@...el.com, chuanhua.lei@...ux.intel.com,
qi-ming.wu@...el.com, yixin.zhu@...el.com,
Dilip Kota <eswara.kota@...ux.intel.com>
Subject: Re: [PATCH v5 3/4] dt-bindings: phy: Add YAML schemas for Intel
ComboPhy
On Wed, 25 Mar 2020 16:59:39 +0800, Dilip Kota wrote:
> ComboPhy subsystem provides PHY support to various
> controllers, viz. PCIe, SATA and EMAC.
> Adding YAML schemas for the same.
>
> Signed-off-by: Dilip Kota <eswara.kota@...ux.intel.com>
> ---
> Changes on v5:
> Add changes as per Rob Herring inputs:
> Use include/dt-bindings/phy/phy.h values to set intel,phy-mode.
> Move children node properties to parent node and remove children
> node completely.
>
> Changes on v4:
> No Change.
>
> Changes on v3:
>
> Add include/dt-bindings/phy/phy-intel-combphy.h for phy modes.
> Add SoC specific compatible "intel,combophy-lgm".
> Correct the nodename pattern.
> clocks description removed and add maxItems entry.
> Remove "simple-bus" as it expects minimum one address
> cell and size cell in the children node. Call devm_of_platform_populate()
> in the driver to perform "simple-bus" functionality.
>
> Changes on v2:
>
> Add custom 'select'
> Pass hardware instance entries with phandles and
> remove cell-index and bid entries
> Clock, register address space, are same for the children.
> So move them to parent node.
> Two PHY instances cannot run in different modes,
> so move the phy-mode entry to parent node.
> Add second child entry in the DT example.
>
> .../devicetree/bindings/phy/intel,combo-phy.yaml | 101 +++++++++++++++++++++
> 1 file changed, 101 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/phy/intel,combo-phy.yaml
>
Reviewed-by: Rob Herring <robh@...nel.org>
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