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Message-ID: <870e9436-34c0-4de3-4414-ac931532ed27@samsung.com>
Date: Wed, 1 Apr 2020 08:23:45 +0900
From: Chanwoo Choi <cw00.choi@...sung.com>
To: Dmitry Osipenko <digetx@...il.com>,
Thierry Reding <thierry.reding@...il.com>,
MyungJoo Ham <myungjoo.ham@...sung.com>,
Kyungmin Park <kyungmin.park@...sung.com>,
Jonathan Hunter <jonathanh@...dia.com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>
Cc: linux-clk@...r.kernel.org, linux-pm@...r.kernel.org,
linux-tegra@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v1 4/5] PM / devfreq: tegra30: Use
clk_round_rate_unboundly()
On 4/1/20 8:22 AM, Chanwoo Choi wrote:
> On 3/31/20 8:16 AM, Dmitry Osipenko wrote:
>> The clk_round_rate() doesn't work for us properly if clock rate is bounded
>> by a min/max rate that is requested by some other clk-user because we're
>> building devfreq's OPP table based on the rounding.
>>
>> In particular this becomes a problem if display driver is probed earlier
>> than devfreq, and thus, display adds a memory bandwidth request using
>> interconnect API, which results in a minimum clock-rate being set for
>> the memory clk. In a result, the lowest devfreq OPP rate is getting
>> limited to the minimum rate imposed by the display driver.
>>
>> Let's use new clk_round_rate_unboundly() that resolves the problem by
>> rounding clock rate without taking into account min/max limits imposed by
>> active clk users.
>>
>> Signed-off-by: Dmitry Osipenko <digetx@...il.com>
>> ---
>> drivers/devfreq/tegra30-devfreq.c | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/devfreq/tegra30-devfreq.c b/drivers/devfreq/tegra30-devfreq.c
>> index 28b2c7ca416e..34f6291e880c 100644
>> --- a/drivers/devfreq/tegra30-devfreq.c
>> +++ b/drivers/devfreq/tegra30-devfreq.c
>> @@ -834,7 +834,7 @@ static int tegra_devfreq_probe(struct platform_device *pdev)
>>
>> reset_control_deassert(tegra->reset);
>>
>> - rate = clk_round_rate(tegra->emc_clock, ULONG_MAX);
>> + rate = clk_round_rate_unboundly(tegra->emc_clock, ULONG_MAX);
>> if (rate < 0) {
>> dev_err(&pdev->dev, "Failed to round clock rate: %ld\n", rate);
>> return rate;
>> @@ -849,7 +849,7 @@ static int tegra_devfreq_probe(struct platform_device *pdev)
>> }
>>
>> for (rate = 0; rate <= tegra->max_freq * KHZ; rate++) {
>> - rate = clk_round_rate(tegra->emc_clock, rate);
>> + rate = clk_round_rate_unboundly(tegra->emc_clock, rate);
>>
>> if (rate < 0) {
>> dev_err(&pdev->dev,
>>
>
> Firstly, patch2 have to be reviewed for this patch.
> I have no any objection. It looks good to me.
>
> If patch1 get the confirmation from clock maintainer,
Sorry. I mean the patch2 about clk_round_rate_unboundly() function.
instead of patch1.
> feel free to add my acked tag:
> Acked-by: Chanwoo Choi <cw00.choi@...sung.com>
>
>
--
Best Regards,
Chanwoo Choi
Samsung Electronics
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