linux-kernel - RE: [PATCH v1 1/2] vfio/pci: Expose PCIe PASID capability to guest

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <A2975661238FB949B60364EF0F2C25743A21A6F8@SHSMSX104.ccr.corp.intel.com>
Date:   Tue, 31 Mar 2020 06:42:18 +0000
From:   "Liu, Yi L" <yi.l.liu@...el.com>
To:     "Tian, Kevin" <kevin.tian@...el.com>,
        "alex.williamson@...hat.com" <alex.williamson@...hat.com>,
        "eric.auger@...hat.com" <eric.auger@...hat.com>
CC:     "jacob.jun.pan@...ux.intel.com" <jacob.jun.pan@...ux.intel.com>,
        "joro@...tes.org" <joro@...tes.org>,
        "Raj, Ashok" <ashok.raj@...el.com>,
        "Tian, Jun J" <jun.j.tian@...el.com>,
        "Sun, Yi Y" <yi.y.sun@...el.com>,
        "jean-philippe@...aro.org" <jean-philippe@...aro.org>,
        "peterx@...hat.com" <peterx@...hat.com>,
        "iommu@...ts.linux-foundation.org" <iommu@...ts.linux-foundation.org>,
        "kvm@...r.kernel.org" <kvm@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "Wu, Hao" <hao.wu@...el.com>
Subject: RE: [PATCH v1 1/2] vfio/pci: Expose PCIe PASID capability to guest

> From: Tian, Kevin <kevin.tian@...el.com>
> Sent: Tuesday, March 31, 2020 2:39 PM
> To: Liu, Yi L <yi.l.liu@...el.com>; alex.williamson@...hat.com;
> Subject: RE: [PATCH v1 1/2] vfio/pci: Expose PCIe PASID capability to guest
> 
> > From: Liu, Yi L <yi.l.liu@...el.com>
> > Sent: Sunday, March 22, 2020 8:33 PM
> >
> > From: Liu Yi L <yi.l.liu@...el.com>
> >
> > This patch exposes PCIe PASID capability to guest. Existing vfio_pci
> > driver hides it from guest by setting the capability length as 0 in
> > pci_ext_cap_length[].
> >
> > This capability is required for vSVA enabling on pass-through PCIe
> > devices.
> 
> should this be [PATCH 2/2], after you have the emulation in place?

oh, yes, I can re-sequence it.

> and it might be worthy of noting that PRI is already exposed, to
> avoid confusion from one like me that why two capabilities are
> emulated in this series while only one is being exposed. 😊

got it. it would be helpful. thanks.

Regards,
Yi Liu