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Message-ID: <20200331083146.10462-3-benjamin.gaignard@st.com>
Date: Tue, 31 Mar 2020 10:31:42 +0200
From: Benjamin Gaignard <benjamin.gaignard@...com>
To: <fabrice.gasnier@...com>, <lee.jones@...aro.org>,
<robh+dt@...nel.org>, <mark.rutland@....com>,
<mcoquelin.stm32@...il.com>, <alexandre.torgue@...com>,
<daniel.lezcano@...aro.org>, <tglx@...utronix.de>
CC: <devicetree@...r.kernel.org>,
<linux-stm32@...md-mailman.stormreply.com>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>,
Benjamin Gaignard <benjamin.gaignard@...com>
Subject: [PATCH v5 2/6] ARM: dts: stm32: Add timer subnodes on stm32mp15 SoCs
Add timer subnode and interrupts to low power timer nodes for
all stm32mp15x SoCs.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@...com>
---
arch/arm/boot/dts/stm32mp151.dtsi | 45 +++++++++++++++++++++++++++++++++++++++
1 file changed, 45 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi
index fb41d0778b00..424925068baf 100644
--- a/arch/arm/boot/dts/stm32mp151.dtsi
+++ b/arch/arm/boot/dts/stm32mp151.dtsi
@@ -358,6 +358,10 @@
reg = <0x40009000 0x400>;
clocks = <&rcc LPTIM1_K>;
clock-names = "mux";
+ interrupt-names = "event", "wakeup";
+ interrupts-extended = <&intc GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
+ <&exti 47 IRQ_TYPE_LEVEL_HIGH>;
+ wakeup-source;
status = "disabled";
pwm {
@@ -376,6 +380,11 @@
compatible = "st,stm32-lptimer-counter";
status = "disabled";
};
+
+ timer {
+ compatible = "st,stm32-lptimer-timer";
+ status = "disabled";
+ };
};
spi2: spi@...0b000 {
@@ -1135,6 +1144,10 @@
reg = <0x50021000 0x400>;
clocks = <&rcc LPTIM2_K>;
clock-names = "mux";
+ interrupt-names = "event", "wakeup";
+ interrupts-extended = <&intc GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
+ <&exti 48 IRQ_TYPE_LEVEL_HIGH>;
+ wakeup-source;
status = "disabled";
pwm {
@@ -1153,6 +1166,11 @@
compatible = "st,stm32-lptimer-counter";
status = "disabled";
};
+
+ timer {
+ compatible = "st,stm32-lptimer-timer";
+ status = "disabled";
+ };
};
lptimer3: timer@...22000 {
@@ -1162,6 +1180,10 @@
reg = <0x50022000 0x400>;
clocks = <&rcc LPTIM3_K>;
clock-names = "mux";
+ interrupt-names = "event", "wakeup";
+ interrupts-extended = <&intc GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>,
+ <&exti 50 IRQ_TYPE_LEVEL_HIGH>;
+ wakeup-source;
status = "disabled";
pwm {
@@ -1175,6 +1197,11 @@
reg = <2>;
status = "disabled";
};
+
+ timer {
+ compatible = "st,stm32-lptimer-timer";
+ status = "disabled";
+ };
};
lptimer4: timer@...23000 {
@@ -1182,6 +1209,10 @@
reg = <0x50023000 0x400>;
clocks = <&rcc LPTIM4_K>;
clock-names = "mux";
+ interrupt-names = "event", "wakeup";
+ interrupts-extended = <&intc GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
+ <&exti 52 IRQ_TYPE_LEVEL_HIGH>;
+ wakeup-source;
status = "disabled";
pwm {
@@ -1189,6 +1220,11 @@
#pwm-cells = <3>;
status = "disabled";
};
+
+ timer {
+ compatible = "st,stm32-lptimer-timer";
+ status = "disabled";
+ };
};
lptimer5: timer@...24000 {
@@ -1196,6 +1232,10 @@
reg = <0x50024000 0x400>;
clocks = <&rcc LPTIM5_K>;
clock-names = "mux";
+ interrupt-names = "event", "wakeup";
+ interrupts-extended = <&intc GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
+ <&exti 53 IRQ_TYPE_LEVEL_HIGH>;
+ wakeup-source;
status = "disabled";
pwm {
@@ -1203,6 +1243,11 @@
#pwm-cells = <3>;
status = "disabled";
};
+
+ timer {
+ compatible = "st,stm32-lptimer-timer";
+ status = "disabled";
+ };
};
vrefbuf: vrefbuf@...25000 {
--
2.15.0
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