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Message-ID: <CANRm+CzB3dWatF7qOO_WajXM_ZBn1U6Z8+uq4NxCuLG3TgwY1Q@mail.gmail.com>
Date: Wed, 1 Apr 2020 14:46:41 +0800
From: Wanpeng Li <kernellwp@...il.com>
To: Paolo Bonzini <pbonzini@...hat.com>
Cc: LKML <linux-kernel@...r.kernel.org>, kvm <kvm@...r.kernel.org>,
Sean Christopherson <sean.j.christopherson@...el.com>,
Vitaly Kuznetsov <vkuznets@...hat.com>,
Wanpeng Li <wanpengli@...cent.com>,
Jim Mattson <jmattson@...gle.com>,
Joerg Roedel <joro@...tes.org>, Nadav Amit <namit@...are.com>
Subject: Re: [PATCH v2 2/2] KVM: LAPIC: Don't need to clear IPI delivery
status in x2apic mode
Cc more people,
On Wed, 1 Apr 2020 at 08:35, Paolo Bonzini <pbonzini@...hat.com> wrote:
>
> On 01/04/20 02:19, Wanpeng Li wrote:
> > - /* No delay here, so we always clear the pending bit */
> > - val &= ~(1 << 12);
> > + /* Immediately clear Delivery Status in xAPIC mode */
> > + if (!apic_x2apic_mode(apic))
> > + val &= ~(1 << 12);
>
> This adds a conditional, and the old behavior was valid according to the
> SDM: "software should not assume the value returned by reading the ICR
> is the last written value".
Nadav, Sean, what do you think?
Wanpeng
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