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Message-ID: <10cd1a8d-7203-c267-a9d7-9ca761d5acce@mm-sol.com>
Date: Wed, 1 Apr 2020 16:17:55 +0300
From: Stanimir Varbanov <svarbanov@...sol.com>
To: Ansuel Smith <ansuelsmth@...il.com>
Cc: Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Andrew Murray <amurray@...goodpenguin.co.uk>,
Philipp Zabel <p.zabel@...gutronix.de>,
linux-arm-msm@...r.kernel.org, linux-pci@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 11/12] devicetree: bindings: pci: add force_gen1 for
qcom,pcie
Hi Ansuel,
Before inventing new DT property I'd suggest you to consult with [1].
There is already property max-link-speed for that purpose.
On 3/20/20 8:34 PM, Ansuel Smith wrote:
> Document force_gen1 optional definition to limit pcie
> line to GEN1 speed
>
> Signed-off-by: Ansuel Smith <ansuelsmth@...il.com>
> ---
> Documentation/devicetree/bindings/pci/qcom,pcie.txt | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.txt b/Documentation/devicetree/bindings/pci/qcom,pcie.txt
> index 8c1d014f37b0..766876465c42 100644
> --- a/Documentation/devicetree/bindings/pci/qcom,pcie.txt
> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.txt
> @@ -260,6 +260,11 @@
> Definition: If not defined is 0. In ipq806x is set to 7. In newer
> revision (v2.0) the offset is zero.
>
> +- force_gen1:
> + Usage: optional
> + Value type: <u32>
> + Definition: Set 1 to force the pcie line to GEN1
> +
> * Example for ipq/apq8064
> pcie@...00000 {
> compatible = "qcom,pcie-apq8064", "qcom,pcie-ipq8064", "snps,dw-pcie";
>
--
regards,
Stan
[1] Documentation/devicetree/bindings/pci/pci.txt
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