| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Date: Wed, 1 Apr 2020 17:03:39 +0200
From: Arnaud Pouliquen <arnaud.pouliquen@...com>
To: Rob Herring <robh@...nel.org>, Mark Rutland <mark.rutland@....com>,
Alexandre Torgue <alexandre.torgue@...com>
CC: <devicetree@...r.kernel.org>,
<linux-stm32@...md-mailman.stormreply.com>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>,
Fabien Dessenne <fabien.dessenne@...com>,
Arnaud Pouliquen <arnaud.pouliquen@...com>
Subject: [PATCH v2] ARM: dts: stm32: add cortex-M4 pdds management in Cortex-M4 node
Add declarations related to the syscon pdds for deep sleep management.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@...com>
---
v2: patch rebasing
arch/arm/boot/dts/stm32mp151.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi
index 5260818543e5..a40772eac487 100644
--- a/arch/arm/boot/dts/stm32mp151.dtsi
+++ b/arch/arm/boot/dts/stm32mp151.dtsi
@@ -1124,6 +1124,11 @@
};
};
+ pwr_mcu: pwr_mcu@...01014 {
+ compatible = "syscon";
+ reg = <0x50001014 0x4>;
+ };
+
exti: interrupt-controller@...0d000 {
compatible = "st,stm32mp1-exti", "syscon";
interrupt-controller;
@@ -1700,6 +1705,7 @@
resets = <&rcc MCU_R>;
st,syscfg-holdboot = <&rcc 0x10C 0x1>;
st,syscfg-tz = <&rcc 0x000 0x1>;
+ st,syscfg-pdds = <&pwr_mcu 0x0 0x1>;
status = "disabled";
};
};
--
2.17.1
Powered by blists - more mailing lists