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Message-ID: <1187d28a-6fb9-fd12-a422-8a4220a11e79@gmail.com>
Date: Thu, 2 Apr 2020 19:20:20 +0200
From: Johan Jonker <jbx6244@...il.com>
To: helen.koike@...labora.com
Cc: dafna.hirschfeld@...labora.com, devel@...verdev.osuosl.org,
devicetree@...r.kernel.org, ezequiel@...labora.com,
heiko@...ech.de, hverkuil-cisco@...all.nl,
karthik.poduval@...il.com, kernel@...labora.com,
linux-kernel@...r.kernel.org, linux-media@...r.kernel.org,
linux-rockchip@...ts.infradead.org, mark.rutland@....com,
robh+dt@...nel.org
Subject: Re: [PATCH 4/4] arm64: dts: rockchip: add isp0 node for rk3399
Hi Helen,
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> index fc0295d2a65a1..815099a0cd0dd 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> @@ -1718,6 +1718,33 @@ vopb_mmu: iommu@...03f00 {
> status = "disabled";
> };
>
> + isp0: isp0@...10000 {
> + compatible = "rockchip,rk3399-cif-isp";
> + reg = <0x0 0xff910000 0x0 0x4000>;
> + interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
> + clocks = <&cru SCLK_ISP0>,
> + <&cru ACLK_ISP0>, <&cru ACLK_ISP0_WRAPPER>,
> + <&cru HCLK_ISP0>, <&cru HCLK_ISP0_WRAPPER>;
> + clock-names = "clk_isp",
> + "aclk_isp", "aclk_isp_wrap",
> + "hclk_isp", "hclk_isp_wrap";
> + power-domains = <&power RK3399_PD_ISP0>;
> + iommus = <&isp0_mmu>;
> + phys = <&mipi_dphy_rx0>;
> + phy-names = "dphy";
Maybe a little sort? But keep rest as it is. Also in example.
iommus = <&isp0_mmu>;
phys = <&mipi_dphy_rx0>;
phy-names = "dphy";
power-domains = <&power RK3399_PD_ISP0>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0>;
Move reg above #address-cells. Change that in example as well.
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
> + };
> + };
> + };
> +
> isp0_mmu: iommu@...14000 {
> compatible = "rockchip,iommu";
> reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
> --
> 2.26.0
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