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Date:   Sat, 4 Apr 2020 17:32:57 +0900
From:   Masami Hiramatsu <mhiramat@...nel.org>
To:     Randy Dunlap <rdunlap@...radead.org>
Cc:     Peter Zijlstra <peterz@...radead.org>,
        Christian König <christian.koenig@....com>,
        Jann Horn <jannh@...gle.com>,
        Harry Wentland <harry.wentland@....com>,
        Leo Li <sunpeng.li@....com>, amd-gfx@...ts.freedesktop.org,
        Alex Deucher <alexander.deucher@....com>,
        "David (ChunMing) Zhou" <David1.Zhou@....com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
        "H. Peter Anvin" <hpa@...or.com>,
        the arch/x86 maintainers <x86@...nel.org>,
        kernel list <linux-kernel@...r.kernel.org>,
        Josh Poimboeuf <jpoimboe@...hat.com>,
        Andy Lutomirski <luto@...nel.org>,
        Arnaldo Carvalho de Melo <acme@...nel.org>
Subject: Re: AMD DC graphics display code enables -mhard-float, -msse,
 -msse2 without any visible FPU state protection

On Fri, 3 Apr 2020 20:15:11 -0700
Randy Dunlap <rdunlap@...radead.org> wrote:

> On 4/3/20 8:08 PM, Masami Hiramatsu wrote:
> > +static inline int insn_is_fpu(struct insn *insn)
> > +{
> > +	if (!insn->opcode.got)
> > +		insn_get_opcode(insn);
> > +	if (inat_is_fpu(insn->attr)) {
> > +		if (insn->attr & INAT_FPUIFVEX)
> > +			return insn_is_avx(insn);
> > +		return 1;
> > +	}
> 
> 	return 0; // ??

Oops, right!

Hm, I need to add a caller for this API...

Thanks,

> 
> > +}
> > +
> 
> 
> -- 
> ~Randy
> 


-- 
Masami Hiramatsu <mhiramat@...nel.org>

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