Message-ID: <CAJiuCcfAKCs5ZLi_O21eyx-ZraC2Sb_ugQSmOEYm5+eVkQ7ZSw@mail.gmail.com>
Date:   Sun, 5 Apr 2020 16:33:37 +0200
From:   Clément Péron <peron.clem@...il.com>
To:     Ondřej Jirman <megous@...ous.com>,
        Clément Péron <peron.clem@...il.com>,
        Maxime Ripard <mripard@...nel.org>,
        Chen-Yu Tsai <wens@...e.org>, Rob Herring <robh+dt@...nel.org>,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
        devicetree <devicetree@...r.kernel.org>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        linux-sunxi <linux-sunxi@...glegroups.com>
Subject: Re: [linux-sunxi] [PATCH 0/7] Add support for Allwinner H6 DVFS

Hi Ondřej,

On Sun, 5 Apr 2020 at 13:51, Ondřej Jirman <megous@...ous.com> wrote:
>
> Hello Clément,
>
> On Sun, Apr 05, 2020 at 12:49:06PM +0200, Clément Péron wrote:
> > Hi Sunxi maintainers and members,
> >
> > Now that required drivers are merged we can contibute on DVFS support for
> > Allwinner H6.
> >
> > This serie is based on Yangtao Li serie[0] and Megous works[1].
> >
> > Most of the OPP tables are taken from original vendor kernel[2].
> > Plus there is a new CPU frequency @1.8GHz.
> >
> > I wrote a simple script to randomly set a frequency during a random time[3].
> > With this script and using stress-ng during a day I didn't see any issue.
> > Moreover I have tested specifically the 1.8GHz on my Beelink GS1, max thermal
> > 80°C is reached after ~10min and then the SoC oscillates quickly between 1.5
> > and 1.8GHz.
>
> Thank you for working on this. :) I wonder what SoC bin you tested this on.
>
> I have a patch to print it here:
>
>   https://megous.com/git/linux/commit/?h=ths-5.7&id=c5ddd2a45c7e04dcec31619b58de7c798ad6594c
My SoC bin is :
[    0.584553] sun50i_cpufreq_nvmem: Using CPU speed bin speed0
>
> > I also test that that offlining CPU0 and doing DVFS on other CPUs works.
> > As CPU regulator is only set for CPU0.
> >
> > But maybe it doesn't cost much to set the regulator for all the CPUs?
> >
> > Jernej test the GPU devfreq on several H6 board particulary the Tanix TX6 which
> > doesn't have a proper dedicated PMIC and doesn't had any trouble with it.
> >
> > Do you think I can enable GPU OPP for all H6 Boards?
> >
> > Also Yangtao Li enable DVFS for OrangePi and Pine64, as I can't test them I
> > didn't reenable these boards. Please, let me know if you want me to add these
> > boards in this serie.
>
> Feel free to add these OPPs also to OrangePi 3 dts, I've been running mine with
> this OPP table for at least a year already (I have the worst SoC bin).
>
> Though I'll run a bit more comprehensive test for more frequencies, like you
> did, just to be sure.
>
> One thing I wonder about is if there should not be some small ramp delay on the
> CPU regulator node, because voltage change probably takes some small time to
> apply, compared to changing the PLL frequency. And I have no idea if the CPU
> is not running for some very small time out of spec during transitions.
>
> I didn't find timing information in the PMIC datasheet, but I suppose based
> on the DCDCA frequency of 3MHz that it will adapt to the new voltage in the
> range of 1s-10s of microseconds.
>
> In datasheet of the similar PMIC (AXP813) there is this note:
>
>   DVM (Dynamic Voltage scaling Management) ramp rate: 2.5mV/us at buck frequency 3MHz

Good point, this information should be added for both CPU and GPU regulator.
This could be nice to confirm this point with a scope.

Also I remark that Allwinner user higher temperature than what we set :
alarm_low_temp = <105000>;
alarm_high_temp = <110000>;
alarm_temp_hysteresis = <15000>;
shut_temp= <115000>;
https://github.com/orangepi-xunlong/OrangePiH6_Linux4_9/blob/master/arch/arm64/boot/dts/sunxi/sun50iw6p1.dtsi#L1924

Don't you think that we can push a bit higher the temperature it's
actually at 80°C ?

Thanks for the review,
Clement

>
> I think it will be simiar with AXP805.
>
> regards,
>         o.
>
> > Thanks,
> > Clément
> >
> > 0: https://patchwork.kernel.org/cover/10815117/
> > 1: https://megous.com/git/linux/log/?h=ths-5.7
> > 2: https://github.com/orangepi-xunlong/OrangePiH6_Linux4_9/blob/master/arch/arm64/boot/dts/sunxi/sun50iw6p1.dtsi#L345-L517
> > 3: https://gist.github.com/clementperon/55a055dae3f13bbd14fb39c0069fe2e2
> >
> > Clément Péron (4):
> >   arm64: dts: allwinner: h6: set thermal polling time
> >   arm64: dts: allwinner: h6: Add GPU Operating Performance Points table
> >   arm64: configs: Enable sun50i cpufreq nvmem
> >   arm64: dts: allwinner: h6: Enable CPU and GPU opp tables for Beelink
> >     GS1
> >
> > Ondrej Jirman (2):
> >   arm64: dts: allwinner: h6: Add thermal trip points/cooling map
> >   arm64: dts: allwinner: h6: Add CPU Operating Performance Points table
> >
> > Yangtao Li (1):
> >   arm64: dts: allwinner: h6: Add clock to CPU cores
> >
> >  .../dts/allwinner/sun50i-h6-beelink-gs1.dts   |  10 +-
> >  .../boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi | 103 ++++++++++++++++++
> >  .../boot/dts/allwinner/sun50i-h6-gpu-opp.dtsi |  74 +++++++++++++
> >  arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi  |  44 +++++++-
> >  arch/arm64/configs/defconfig                  |   1 +
> >  5 files changed, 226 insertions(+), 6 deletions(-)
> >  create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi
> >  create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h6-gpu-opp.dtsi
> >
> > --
> > 2.20.1
> >
> > --
> > You received this message because you are subscribed to the Google Groups "linux-sunxi" group.
> > To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscribe@...glegroups.com.
> > To view this discussion on the web, visit https://groups.google.com/d/msgid/linux-sunxi/20200405104913.22806-1-peron.clem%40gmail.com.

Powered by blists - more mailing lists